NXP USA Inc. MC9S12E64CFUE

MCU 16-bit HCS12 HCS12 CISC 64KB Flash 2.5V/3.3V/5V Automotive 80-Pin PQFP Tray
HCS12 HCS12 Microcontroller IC 16-Bit 25MHz 64KB (64K x 8) FLASH 80-QFP (14x14)
S12E 16-bit MCU, HCS12 core, 64KB Flash, 50MHz, QFP 80NXP Semiconductors SCT
Product Range:HCS12 Microcontrollers; Device Core:HCS12; Data Bus Width:16 bit; Operating Frequency Max:25MHz; Program Memory Size:64KB; No. of Pins:80Pins; IC Case / Package:QFP; No. of I/O s:58I/O s; Interfaces:I2C, SCI, SPI RoHS Compliant: Yes
Device Core = HCS12 / Data Bus Width Bit = 16 / Instruction Set Architecture = CISC / Family Name = S12E / Clock Frequency Max. MHz = 25 / Program Memory Type = Flash / Program Memory Size KB = 64 / RAM Memory Size KB = 8 / Interfaces = SCI / Interfaces = SPI / ADC Channels = 16 / ADC Resolution Bit = 10 / DAC Resolution Bit = 8 / Number of Programmable I/Os = 60 / Number of Timers/Counters = 3 / Supply Voltage Min. V = 3 / Supply Voltage Max. V = 5.5 / Operating Temperature Min. °C = -40 / Operating Temperature Max. °C = 85 / Package Type = HQFP / Pins = 80 / Mounting Type = SMD / MSL = Level-3 / Packaging = Tray / Length mm = 14 / Width mm = 14 / Height mm = 2.3 / Reflow Temperature Max. °C = 260
16BIT 64K FLASH MCU, SMD, QFP80; SVHC:Cobalt dichloride; Series:MC9S12; Memory Size, Flash:64KB; EEPROM Size:1024Byte; Memory Size, RAM:4096Byte; No of I/O Lines:60; No. of ADC Inputs:16; Timers, No. of:4; PWM Channels, No of:6; Clock Frequency:25MHz; Interface Type:I2C, SCI, SPI; Voltage, Supply Min:2.5V; Voltage, Supply Max:5V; Termination Type:SMD; Case Style:QFP; No. of Pins:80; Operating Temperature Range:-40°C to 85°C; Temp, Op. Max:85°C; Temp, Op. Min:-40°C; Base Number:12; Bits, Number In Timer:16; Bits, Number in ADC:10; Logic Function Number:12E64; Memory Size:65536; Memory Type:FLASH; Microprocessor/Controller Features:IIC, SCI, SPI; No. of Bits:16; Packaging Type:Peel Pack; Qualified Segment:COMMERCIAL, INDUSTRIAL
Consult the ATD_10B16C Block Guide for further information about the A/D Converter module. Note that V04 of the ATD has an external trigger (ETRIG) function which is tied off and not available for use. Section 8 Clock Reset Generator (CRG) Block Description Consult the CRG Block Guide for information about the Clock and Reset Generator module.8.1 Device-specific information The Low Voltage Reset feature uses the low voltage reset signal from the VREG module as an input to the CRG module. When the regulator output voltage supply to the internal chip logic falls below a specified threshold the LVR signal from the VREG module causes the CRG module to generate a reset. Consult the VREG Block Guide for voltage level specifications. 3F.8.1.1 XCLKS The XCLKS input signal is active low (see 2.3.8 PE7 / NOACC / XCLKS -- Port E I/O Pin 7). Section 9 Digital to Analog Converter (DAC) Block Description There are two digital to analog converter modules (DAC0, DAC1). Consult the DAC Block Guide for information about the DAC Module.