NXP USA Inc. MC9S08LL64CLH

MC9S08LL64CLH Description
Although this device has circuitry to guard against damage from high static voltage or electric fields, it is nevertheless advisable to use standard safety precautions to prevent applying any voltages greater than the maximum rated voltages to this high-impedance circuit. Unused inputs should be connected to the proper logic voltage level (for example, either VSS or VDD), or the pin's programmable pullup resistor should be enabled, to improve operation reliability.

MC9S08LL64CLH Features
Up to 40 MHz CPU at 3.6 V to 2.1 V across temperature range of –40 °C to 85 °C
Up to 20 MHz at 2.1 V to 1.8 V across temperature range of –40 °C to 85 °C
HC08 instruction set with added BGND instruction
Support for up to 32 interrupt/reset sources
Two low-power stop modes
Reduced-power wait mode
Low-power run and wait modes allow peripherals to run while voltage regulator is in standby
Peripheral clock gating register can disable clocks to unused modules, thereby reducing currents
Very low-power external oscillator that can be used in stop2 or stop3 modes to provide accurate clock source to time-of-day (TOD) module
6 μs typical wakeup time from stop3 mode

MC9S08LL64CLH Applications
Power Management
Consumer Electronics
Portable Devices
Industrial