NXP USA Inc. LPC2214FBD144/01,5

LPC2214FBD144/01,5 Description
The LPC2214FBD144/01,5 is based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128/256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at a maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with a minimal performance penalty.

LPC2214FBD144/01,5 Features
Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device. They also allow for a port pin to be read at any time regardless of its function. Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are 5 V tolerant when configured for digital I/O function(s). UART0/1 includes a fractional baud rate generator, auto-baud capabilities, and handshake flow control fully implemented in hardware. Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats. SPI programmable data length and master mode enhancement. Diversified Code Read Protection (CRP) enables different security levels to be implemented. This feature is available in LPC2212/2214/00 devices as well. General-purpose timers can operate as external event counters.

LPC2214FBD144/01,5 Applications
Communications equipment  Datacom module  Industrial  Grid infrastructure  Enterprise systems  Datacenter & enterprise computing