Xilinx Inc. XC2V3000-4BF957C
- Part Number:
- XC2V3000-4BF957C
- Manufacturer:
- Xilinx Inc.
- Ventron No:
- 3822397-XC2V3000-4BF957C
- Description:
- IC FPGA 684 I/O 957FCBGA
- Datasheet:
- Virtex-II Platform FPGAs
Xilinx Inc. XC2V3000-4BF957C technical specifications, attributes, parameters and parts with similar specifications to Xilinx Inc. XC2V3000-4BF957C.
- Voltage - Supply:1.425 V ~ 1.575 V
- Total RAM Bits:1769472
- Supplier Device Package:957-FCBGA (40x40)
- Series:Virtex®-II
- Package / Case:957-BBGA, FCBGA
- Operating Temperature:0°C ~ 85°C (TJ)
- Number of LABs/CLBs:3584
- Number of I/O:684
- Number of Gates:3000000
- Mounting Type:Surface Mount
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XC2V3000-4BF957C More Descriptions
FPGA Virtex-II Family 3M Gates 32256 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 957-Pin FCBGA
Contains Lead CMOS 2007 Non-RoHS Compliant FPGA 0C~85C TJ 216kB 650MHz 1.5V
The Virtex-II family is a platform FPGA developed for high performance from low-density to high-density designs that are based on IP cores and customized modules. The family delivers complete solutions for telecommunication, wireless, networking, video, and DSP applications, including PCI, LVDS, and DDR interfaces. The leading-edge 0.15 um / 0.12 um CMOS 8-layer metal process and the Virtex-II architecture are optimized for high speed with low power consumption. Combining a wide variety of flexible features and a large range of densities up to 10 million system gates, the Virtex-II family enhances programmable logic design capabilities and is a powerful alternative to mask-programmed gates arrays. As shown in Table 1, the Virtex-II family comprises 11 members, ranging from 40K to 8M system gates.
Contains Lead CMOS 2007 Non-RoHS Compliant FPGA 0C~85C TJ 216kB 650MHz 1.5V
The Virtex-II family is a platform FPGA developed for high performance from low-density to high-density designs that are based on IP cores and customized modules. The family delivers complete solutions for telecommunication, wireless, networking, video, and DSP applications, including PCI, LVDS, and DDR interfaces. The leading-edge 0.15 um / 0.12 um CMOS 8-layer metal process and the Virtex-II architecture are optimized for high speed with low power consumption. Combining a wide variety of flexible features and a large range of densities up to 10 million system gates, the Virtex-II family enhances programmable logic design capabilities and is a powerful alternative to mask-programmed gates arrays. As shown in Table 1, the Virtex-II family comprises 11 members, ranging from 40K to 8M system gates.
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