ON Semiconductor MC100EP140DG

Description
The MC100EP140 is a threestate phasefrequency detector designed for phaselocked loop applications requiring minimal phase and frequency difference at lock. Its fully differential internal gates reduce noise, especially at high speeds. The PFD compares an incoming feedback signal to a reference signal. When the signals differ in frequency and/or phase, the differential UP (U) and DOWN (D) outputs provide pulse streams that, when subtracted and integrated, generate an error voltage for VCO control.

Features
500 ps typical propagation delay
Maximum frequency > 2.1 GHz typical
Fully differential internal design
Advanced high band output swing of 400 mV
Transfer gain: 1.0 mV/Degree at 1.4 GHz, 1.2 mV/Degree at 1.0 GHz
Rise and fall time: 100 ps typical
Temperature compensation
PECL mode operating range: Vcc 3.0 V to 3.6 V with VEE = 0 V
NECL mode operating range: Vcc = 0 V with VEE 3.0 V to 3.6 V
Open input default state
PbFree packages available

Applications
Phaselocked loop applications requiring minimal phase and frequency difference at lock