IDT, Integrated Device Technology Inc 9DB401BFLFT

Description
The 9DB401C is a DB400 Version 2.0 Yellow Cover part with PCI Express support. It provides low cycle-to-cycle jitter (50ps), low output-to-output skew (100ps), and is PCI Express gen 1 compliant. The 9DB401C supports a 1 to 4 output configuration, taking a spread or non-spread differential HCSL input from a CK410(B) main clock or any other differential HCSL pair. It can generate HCSL or LVDS outputs from 50 to 200MHz in PLL mode or 0 to 400Mhz in bypass mode. Two de-jittering modes are available, selectable through the HIGH BWA input pin: high bandwidth mode for spread inputs and low bandwidth mode for non-spread inputs. The SRC STOP, PD#, and OE real-time input pins provide programmable power management control.

Features
4-0.7V HCSL or LVDS differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
Spread spectrum modulation tolerant, 0 to -0.5% downspread and /- 0.25% center spread
Supports undriven differential outputs in PD# and SRC STOP# modes for power management
Outputs cycle-cycle jitter: <50ps
Outputs skew: <50ps
Extended frequency range in bypass mode:
Revision B: up to 333.33MHz
Revision C: up to 400MHz
Real-time PLL lock detect output pin
28-pin SSOP/TSSOP package
Available in RoHS compliant packaging

Applications
PC or embedded systems
PCI Express support
Clock distribution
Power management