Microsemi Corporation ZL30169LDG1

Description
The Microsemi ZL30169 is a tiny 3-input, 3-output clock translator designed for OTN applications. It features a low-bandwidth DPLL and a high-resolution fractional-N APLL, enabling precise frequency conversion and jitter attenuation. The ZL30169 offers automatic self-configuration, easy-to-use evaluation software, and a variety of configuration options.

Features
Input Clocks:
Three inputs: two differential/CMOS, one CMOS
Frequency range: 1kHz to 1250MHz (1kHz to 300MHz for CMOS)
Automatic or manual reference switching
Low-Bandwidth DPLL:
Programmable bandwidth: 14Hz to 500Hz
Attenuates jitter up to several UI
Freerun or holdover on loss of all inputs
Hitless reference switching
High-resolution holdover averaging
Digitally controlled phase adjustment
High-Resolution Fractional-N APLL and 3 Outputs:
Fractional frequency conversion with 0ppm error
Output frequency range: <1Hz to 1035MHz
Independent dividers for each output
Output jitter: typically 0.16 to 0.28ps RMS (12kHz-20MHz integration band)
CML or 2xCMOS outputs, interfacing with LVDS, LVPECL, HSTL, SSTL, and HCSL
Per-Output Features:
Supply pin with CMOS output voltages from 1.5V to 3.3V
Precise output alignment circuitry and per-output phase adjustment
Enable/disable and glitchless start/stop
General Features:
Automatic self-configuration from internal EEPROM
Up to four configuration pin-selectable
Numerically controlled oscillator mode
Zero-delay mode with external feedback
SPI or I²C processor interface

Applications
Telecom OTN and FEC frequency conversion
Frequency conversion and jitter attenuation in various equipment types