Texas Instruments SN74V273-10PZA
- Part Number:
- SN74V273-10PZA
- Manufacturer:
- Texas Instruments
- Ventron No:
- 3834071-SN74V273-10PZA
- Description:
- IC SYNC FIFO 16KX18 80QFP
- Datasheet:
- SN74V273-10PZA
Texas Instruments SN74V273-10PZA technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments SN74V273-10PZA.
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case80-LQFP
- Number of Pins80
- Operating Temperature0°C~70°C
- PackagingTray
- Series74V
- JESD-609 Codee4
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)4 (72 Hours)
- Number of Terminations80
- ECCN CodeEAR99
- Terminal FinishNickel/Palladium/Gold (Ni/Pd/Au)
- SubcategoryFIFOs
- TechnologyCMOS
- Voltage - Supply3.15V~3.45V
- Terminal PositionQUAD
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)260
- Supply Voltage3.3V
- Terminal Pitch0.65mm
- Frequency100MHz
- Base Part Number74V273
- FunctionSynchronous
- Operating Supply Voltage3.3V
- Supply Voltage-Max (Vsup)3.45V
- Supply Voltage-Min (Vsup)3.15V
- Number of Circuits2
- Memory Size288K 16K x 18 32K x 9
- Element ConfigurationDual
- Nominal Supply Current35mA
- Max Supply Current35mA
- Access Time6.5ns
- Data Bus Width18b
- DirectionUnidirectional
- Organization16KX18
- Output Characteristics3-STATE
- Density288 kb
- Standby Current-Max0.015A
- Parallel/SerialPARALLEL
- Memory IC TypeOTHER FIFO
- Bus DirectionalUni-Directional
- FWFT SupportYes
- Output EnableYES
- Expansion TypeDepth, Width
- Cycle Time10 ns
- Height1.6mm
- Length14mm
- Width14mm
- Thickness1.4mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
SN74V273-10PZA Overview
The 80-LQFP package contains FIFO memory chip.Tray case is used for packaging.Apps and data can be stored in the 288K 16K x 18 32K x 9 memory of the FIFO chip.The temperature should be adjusted to 0°C~70°C in order to ensure reliable operation.The mounting type of the FIFO memory is Surface Mount .For operation, it requires a supply voltage of 3.15V~3.45V .The 74V series is represented by this memory logic.Mounting it Surface Mount is recommended.This object belongs to the family 74V273 .With a supply voltage of 3.3V volts, high efficiency is possible.FIFO means contains 80 terminations.FIFO design has 80 operation pins.FIFO requires a minimum of 35mA current to operate.In order to maximize efficiency, the supply voltage should be set to 3.3V .The gadget is self-contained and can be found in FIFOs .The IC of the part is OTHER FIFO memory type.A frequency of 100MHz is capable of maintaining good accuracy.There is a FIFO memory IC's maximum supply voltage of 3.45V (Vsup).Ideally, the supply voltage (Vsup) should stay above 3.15V .FIFO memory chip offers enhanced flexibility due to its use of 2 circuits.
SN74V273-10PZA Features
288K 16K x 18 32K x 9 memory size
74V series
Best part number of 74V273
FIFOs category
SN74V273-10PZA Applications
There are a lot of Texas Instruments SN74V273-10PZA FIFOs Memory applications.
Notebook
SPI Bus Flash Memory Device
Consumer
IP Camera Buffer
Switches
Video Processing
High-speed graphics pixel buffer
Look-up Tables
IP Radio
Disk Controllers
The 80-LQFP package contains FIFO memory chip.Tray case is used for packaging.Apps and data can be stored in the 288K 16K x 18 32K x 9 memory of the FIFO chip.The temperature should be adjusted to 0°C~70°C in order to ensure reliable operation.The mounting type of the FIFO memory is Surface Mount .For operation, it requires a supply voltage of 3.15V~3.45V .The 74V series is represented by this memory logic.Mounting it Surface Mount is recommended.This object belongs to the family 74V273 .With a supply voltage of 3.3V volts, high efficiency is possible.FIFO means contains 80 terminations.FIFO design has 80 operation pins.FIFO requires a minimum of 35mA current to operate.In order to maximize efficiency, the supply voltage should be set to 3.3V .The gadget is self-contained and can be found in FIFOs .The IC of the part is OTHER FIFO memory type.A frequency of 100MHz is capable of maintaining good accuracy.There is a FIFO memory IC's maximum supply voltage of 3.45V (Vsup).Ideally, the supply voltage (Vsup) should stay above 3.15V .FIFO memory chip offers enhanced flexibility due to its use of 2 circuits.
SN74V273-10PZA Features
288K 16K x 18 32K x 9 memory size
74V series
Best part number of 74V273
FIFOs category
SN74V273-10PZA Applications
There are a lot of Texas Instruments SN74V273-10PZA FIFOs Memory applications.
Notebook
SPI Bus Flash Memory Device
Consumer
IP Camera Buffer
Switches
Video Processing
High-speed graphics pixel buffer
Look-up Tables
IP Radio
Disk Controllers
SN74V273-10PZA More Descriptions
FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 18/32K x 9 80-Pin LQFP Tray
16384 x 18 Synchronous FIFO Memory 80-LQFP 0 to 70
The SN74V263, SN74V273, SN74V283, and SN74V293 are exceptionally deep, high-speed, CMOS first-in first-out (FIFO) memories with clocked read and write controls and a flexible bus-matching *9/*18 data flow. There is flexible *9/*18 bus matching on both read and write ports. The period required by the retransmit operation is fixed and short. The first-word data-latency period, from the time the first word is written to an empty FIFO to the time it can beread, is fixed and short. These FIFOs are particularly appropriate for network, video, telecommunications, data communications, andother applications that need to buffer large amounts of data and match buses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either an 18-bitor 9-bit width, as determined by the state of external control pins' input width (IW) and output width (OW) during the master-reset cycle. The input port is controlled by write-clock (WCLK) and write-enable (WEN) inputs. Data is written into the FIFO on every rising edge of WCLK when WEN is asserted. The output port is controlled by read-clock (RCLK) and read-enable (REN) inputs. Data is read from the FIFO on every rising edge of RCLK when REN is asserted. An output-enable (OE) input is provided for 3-state control of the outputs. Copyright (C) 2003, Texas Instruments Incorporated Production DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
16384 x 18 Synchronous FIFO Memory 80-LQFP 0 to 70
The SN74V263, SN74V273, SN74V283, and SN74V293 are exceptionally deep, high-speed, CMOS first-in first-out (FIFO) memories with clocked read and write controls and a flexible bus-matching *9/*18 data flow. There is flexible *9/*18 bus matching on both read and write ports. The period required by the retransmit operation is fixed and short. The first-word data-latency period, from the time the first word is written to an empty FIFO to the time it can beread, is fixed and short. These FIFOs are particularly appropriate for network, video, telecommunications, data communications, andother applications that need to buffer large amounts of data and match buses of unequal sizes. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either an 18-bitor 9-bit width, as determined by the state of external control pins' input width (IW) and output width (OW) during the master-reset cycle. The input port is controlled by write-clock (WCLK) and write-enable (WEN) inputs. Data is written into the FIFO on every rising edge of WCLK when WEN is asserted. The output port is controlled by read-clock (RCLK) and read-enable (REN) inputs. Data is read from the FIFO on every rising edge of RCLK when REN is asserted. An output-enable (OE) input is provided for 3-state control of the outputs. Copyright (C) 2003, Texas Instruments Incorporated Production DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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