ON Semiconductor NB3H83905CMNG

Description
The NB3H83905C is a 1.8 V, 2.5 V, or 3.3 V VDD core crystal input to 1:6 LVTTL/LVCMOS fanout buffer with outputs powered by a flexible 1.8 V, 2.5 V, or 3.3 V supply VDDO (with VDD ≥ VDDO). The device accepts a fundamental Parallel Resonant crystal from 3 MHz to 40 MHz or a singleended LVCMOS Clock from up to 100 MHz. Two synchronous LVTTL/LVCMOS Enable lines permit independent control over outputs BCLK[0:4] and output BCLK5; enabling or disabling only when the output is in a LOW state, eliminating potential output glitching or runt pulse generation. When unused, leave floating open, pins will default to a HIGH state. The 6 outputs drive 50 Ω series or parallel terminated transmission lines. Parallel termination should be to 1/2 Vcc. Series terminated lines can drive 2 loads each, or 12 lines total. Fit, Form, and Function compatible with ICS83905 and P16C10806.

Features
Six Copies of LVTTL/LVCMOS Output Clock
Supply Operation VDD ≥ VDDO: 1.8 V ± 0.2 V, 2.5 V ± 5%, or 3.3 V ± 5% Core VDD
1.8 V ± 0.2 V, 2.5 V ± 5%, or 3.3 V ± 5% Output VDDO
Crystal Oscillator Interface
Crystal Input Frequency Range: 3 MHz to 40 MHz
Clock Input Frequency Range: Up to 100 MHz
LVCMOS compatible Enable Inputs
5V Tolerant Enable Inputs
Low Output to Output Skew: 80 ps Max
Synchronous Output Enable
Phase Noise Floor 160 dBc (1 MHz)
Industrial Temperature Range
These are PbFree Devices

Applications
Telecom/Datacom/Networking
Industrial
Consumer