Lattice Semiconductor Corporation LC4064V-75TN100I
- Part Number:
- LC4064V-75TN100I
- Manufacturer:
- Lattice Semiconductor Corporation
- Ventron No:
- 3122922-LC4064V-75TN100I
- Description:
- IC CPLD 64MC 7.5NS 100TQFP
- Datasheet:
- LC4064V-75TN100I
Lattice Semiconductor Corporation LC4064V-75TN100I technical specifications, attributes, parameters and parts with similar specifications to Lattice Semiconductor Corporation LC4064V-75TN100I.
- Factory Lead Time8 Weeks
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case100-LQFP
- Number of Pins100
- Weight657.000198mg
- Operating Temperature-40°C~105°C TJ
- PackagingTray
- Published2000
- SeriesispMACH® 4000V
- JESD-609 Codee3
- Pbfree Codeyes
- Part StatusActive
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations100
- ECCN CodeEAR99
- Terminal FinishMatte Tin (Sn)
- Additional FeatureYES
- SubcategoryProgrammable Logic Devices
- TechnologyCMOS
- Terminal PositionQUAD
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)260
- Supply Voltage3.3V
- Terminal Pitch0.5mm
- Frequency178.57MHz
- Reflow Temperature-Max (s)30
- Base Part NumberLC4064
- Pin Count100
- Qualification StatusNot Qualified
- Operating Supply Voltage3.3V
- Programmable TypeIn System Programmable
- Max Supply Voltage3.6V
- Min Supply Voltage3V
- Operating Supply Current12mA
- Number of I/O64
- Memory TypeEEPROM
- Propagation Delay2.5 ns
- Turn On Delay Time7.5 ns
- Number of Logic Blocks (LABs)80
- Output FunctionMACROCELL
- Number of Macro Cells64
- JTAG BSTYES
- Number of Dedicated Inputs10
- Voltage Supply - Internal3V~3.6V
- Number of Logic Elements/Blocks4
- Height Seated (Max)1.6mm
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
LC4064V-75TN100I Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).A 100-LQFP package contains the item.There are 64 I/Os on the board.There is a 100terminations set on devices.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.A voltage of 3.3Vprovides power to the device.The part is included in Programmable Logic Devices.Trayis the packaging method.The operating temperature of the machine is -40°C~105°C TJ to ensure its reliability.It is recommended that the chip be mounted by Surface Mount.In FPGA terms, it is a type of ispMACH? 4000Vseries FPGA.Chips are programmed with 100 pins.This device can also display [0].The LC4064shows its related parts.The supply voltage should be maintained at 3.3V for high efficiency.In order to store data, EEPROMis used.In this case, Surface Mountis used to mount the electronic component.The device has a pinout of [0].It operates with the maximal supply voltage of 3.6V.The minimal supply voltage is 3V.A total of 4logic elements/blocks are present.A frequency of 178.57MHzcan be achieved.The system consists of 80 logic blocks (LABs).The status of input signals is determined by 10dedicated inputs.
LC4064V-75TN100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~105°C TJ
100 pin count
100 pins
80 logic blocks (LABs)
LC4064V-75TN100I Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-75TN100I CPLDs applications.
Multiple Clock Source Selection
Custom state machines
D/T registers and latches
Synchronous or asynchronous mode
Voltage level translation
Storage Cards and Storage Racks
Random logic replacement
ON-CHIP OSCILLATOR CIRCUIT
Discrete logic functions
Portable digital devices
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).A 100-LQFP package contains the item.There are 64 I/Os on the board.There is a 100terminations set on devices.As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.A voltage of 3.3Vprovides power to the device.The part is included in Programmable Logic Devices.Trayis the packaging method.The operating temperature of the machine is -40°C~105°C TJ to ensure its reliability.It is recommended that the chip be mounted by Surface Mount.In FPGA terms, it is a type of ispMACH? 4000Vseries FPGA.Chips are programmed with 100 pins.This device can also display [0].The LC4064shows its related parts.The supply voltage should be maintained at 3.3V for high efficiency.In order to store data, EEPROMis used.In this case, Surface Mountis used to mount the electronic component.The device has a pinout of [0].It operates with the maximal supply voltage of 3.6V.The minimal supply voltage is 3V.A total of 4logic elements/blocks are present.A frequency of 178.57MHzcan be achieved.The system consists of 80 logic blocks (LABs).The status of input signals is determined by 10dedicated inputs.
LC4064V-75TN100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~105°C TJ
100 pin count
100 pins
80 logic blocks (LABs)
LC4064V-75TN100I Applications
There are a lot of Lattice Semiconductor Corporation LC4064V-75TN100I CPLDs applications.
Multiple Clock Source Selection
Custom state machines
D/T registers and latches
Synchronous or asynchronous mode
Voltage level translation
Storage Cards and Storage Racks
Random logic replacement
ON-CHIP OSCILLATOR CIRCUIT
Discrete logic functions
Portable digital devices
LC4064V-75TN100I More Descriptions
YES 100-LQFP 2000 LC4064 complex programmable logic device 178.57MHz 12mA 1.6mm 7.5ns
CPLD ispMACH® 4000V Family 64 Macro Cells 168MHz 3.3V 100-Pin TQFP Tray
Ispmach 4064V; 64Mc; 3.3V; High I/O Rohs Compliant: Yes |Lattice Semiconductor LC4064V-75TN100I
4 PLD TQFP-100(14x14) Programmable Logic Device (CPLDs/FPGAs) ROHS
Complex Programmable Logic Devices - CPLDs PROGRAMMABLE SUPER FAST HI DENSITY PLD
EE PLD, 7.5ns, 64-Cell, PAD-Type, PQFP100
64MC 64 I/O ispJTAG 3.3V 7.5ns IND
Product Description Demo for Development.
French Electronic Distributor since 1988
CPLD ispMACH® 4000V Family 64 Macro Cells 168MHz 3.3V 100-Pin TQFP Tray
Ispmach 4064V; 64Mc; 3.3V; High I/O Rohs Compliant: Yes |Lattice Semiconductor LC4064V-75TN100I
4 PLD TQFP-100(14x14) Programmable Logic Device (CPLDs/FPGAs) ROHS
Complex Programmable Logic Devices - CPLDs PROGRAMMABLE SUPER FAST HI DENSITY PLD
EE PLD, 7.5ns, 64-Cell, PAD-Type, PQFP100
64MC 64 I/O ispJTAG 3.3V 7.5ns IND
Product Description Demo for Development.
French Electronic Distributor since 1988
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