IDT, Integrated Device Technology Inc IDT5T2010NLGI
- Part Number:
- IDT5T2010NLGI
- Manufacturer:
- IDT, Integrated Device Technology Inc
- Ventron No:
- 2982942-IDT5T2010NLGI
- Description:
- IC CLK DVR ZD PLL 2.5V 68-VFQFPN
- Datasheet:
- IDT5T2010
Description
The IDT5T2010 is a 2.5V PLL clock driver designed for high-performance computing and data-communications applications. It features ten single-ended outputs in five banks of two, plus a dedicated differential feedback. The redundant input capability allows for a smooth transition to a secondary clock source when the primary clock source is absent. The feedback bank enables divide-by-functionality from 1 to 12 through the use of the DS[1:0] inputs, providing frequency multiplication without using divided outputs for feedback. Each output bank also supports divide-by-2 or 4 functionality.
The IDT5T2010 offers user-selectable single-ended or differential input to ten single-ended outputs. It can translate from differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to HSTL, eHSTL, or 1.8V/2.5V LVTTL outputs. Selectable interface is controlled by 3-level input signals that can be hard-wired to appropriate high-mid-low levels. The outputs can be synchronously enabled/disabled.
When PE is held high, all outputs are synchronized with the positive edge of the REF clock input. When PE is held low, all outputs are synchronized with the negative edge of REF.
Features
2.5V operation
0.5 pairs of outputs
Low skew: 50ps same pair, 100ps all outputs
Selectable positive or negative edge synchronization
Tolerant of spread spectrum input clock
Synchronous output enable
Selectable inputs
Input frequency: 4.17MHz to 250MHz
Output frequency: 12.5MHz to 250MHz
1.8V/2.5V LVTTL: up to 250MHz
HSTL/eHSTL: up to 250MHz
Hot insertable and over-voltage tolerant inputs
3-level inputs for selectable interface
3-level inputs for feedback divide selection with multiply ratios of (1-6, 8, 10, 12)
Selectable HSTL, eHSTL, 1.8V/2.5V LVTTL, or LVEPECL input interface
Selectable differential or single-ended inputs and ten single-ended outputs
PLL bypass for DC testing
External differential feedback, internal loop filter
Low Jitter: <75ps cycle-to-cycle
Power-down mode
Lock indicator
Available in BGA and VFQFPN packages
Applications
High-performance computing
Data-communications
Networking
Storage
Industrial automation
The IDT5T2010 is a 2.5V PLL clock driver designed for high-performance computing and data-communications applications. It features ten single-ended outputs in five banks of two, plus a dedicated differential feedback. The redundant input capability allows for a smooth transition to a secondary clock source when the primary clock source is absent. The feedback bank enables divide-by-functionality from 1 to 12 through the use of the DS[1:0] inputs, providing frequency multiplication without using divided outputs for feedback. Each output bank also supports divide-by-2 or 4 functionality.
The IDT5T2010 offers user-selectable single-ended or differential input to ten single-ended outputs. It can translate from differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to HSTL, eHSTL, or 1.8V/2.5V LVTTL outputs. Selectable interface is controlled by 3-level input signals that can be hard-wired to appropriate high-mid-low levels. The outputs can be synchronously enabled/disabled.
When PE is held high, all outputs are synchronized with the positive edge of the REF clock input. When PE is held low, all outputs are synchronized with the negative edge of REF.
Features
2.5V operation
0.5 pairs of outputs
Low skew: 50ps same pair, 100ps all outputs
Selectable positive or negative edge synchronization
Tolerant of spread spectrum input clock
Synchronous output enable
Selectable inputs
Input frequency: 4.17MHz to 250MHz
Output frequency: 12.5MHz to 250MHz
1.8V/2.5V LVTTL: up to 250MHz
HSTL/eHSTL: up to 250MHz
Hot insertable and over-voltage tolerant inputs
3-level inputs for selectable interface
3-level inputs for feedback divide selection with multiply ratios of (1-6, 8, 10, 12)
Selectable HSTL, eHSTL, 1.8V/2.5V LVTTL, or LVEPECL input interface
Selectable differential or single-ended inputs and ten single-ended outputs
PLL bypass for DC testing
External differential feedback, internal loop filter
Low Jitter: <75ps cycle-to-cycle
Power-down mode
Lock indicator
Available in BGA and VFQFPN packages
Applications
High-performance computing
Data-communications
Networking
Storage
Industrial automation
IDT, Integrated Device Technology Inc IDT5T2010NLGI technical specifications, attributes, parameters and parts with similar specifications to IDT, Integrated Device Technology Inc IDT5T2010NLGI.
- Mounting TypeSurface Mount
- Package / Case68-VFQFN Exposed Pad
- Supplier Device Package68-VFQFPN (10x10)
- Operating Temperature-40°C~85°C
- PackagingTray
- SeriesTeraClock™
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Voltage - Supply2.3V~2.7V
- Base Part NumberIDT5T2010
- OutputeHSTL, HSTL, LVTTL
- Number of Circuits1
- Frequency (Max)250MHz
- InputeHSTL, HSTL, LVPECL, LVTTL
- Ratio - Input:Output2:10
- PLLYes with Bypass
- Differential - Input:OutputYes/No
- Divider/MultiplierYes/No
The three parts on the right have similar specifications to IDT5T2010NLGI.
-
ImagePart NumberManufacturerMounting TypePackage / CaseSupplier Device PackageOperating TemperaturePackagingSeriesPart StatusMoisture Sensitivity Level (MSL)Voltage - SupplyBase Part NumberOutputNumber of CircuitsFrequency (Max)InputRatio - Input:OutputPLLDifferential - Input:OutputDivider/MultiplierRoHS StatusView Compare
-
IDT5T2010NLGISurface Mount68-VFQFN Exposed Pad68-VFQFPN (10x10)-40°C~85°CTrayTeraClock™Obsolete3 (168 Hours)2.3V~2.7VIDT5T2010eHSTL, HSTL, LVTTL1250MHzeHSTL, HSTL, LVPECL, LVTTL2:10Yes with BypassYes/NoYes/No--
-
Surface Mount68-VFQFN Exposed Pad68-VFQFPN (10x10)-40°C~85°CTape & Reel (TR)-Obsolete3 (168 Hours)2.3V~2.7VIDT5T9820eHSTL, HSTL, LVTTL1250MHzeHSTL, HSTL, LVPECL, LVTTL2:10Yes with BypassYes/NoYes/No-
-
Surface Mount32-LQFP32-LQFP (7x7)-40°C~85°CTape & Reel (TR)TurboClock™ II JRObsolete3 (168 Hours)2.3V~2.7VIDT5T9950LVTTL1200MHzLVTTL1:8Yes with BypassNo/NoYes/Yes-
-
Surface Mount68-VFQFN Exposed Pad--40°C~85°CTape & Reel (TR)-Obsolete3 (168 Hours)2.3V~2.7VIDT5T9821eHSTL, HSTL, LVTTL1250MHzeHSTL, HSTL, LVPECL, LVTTL2:5Yes with BypassYes/YesYes/NoNon-RoHS Compliant
Popular Search Part Number
Related Keywords
Search Tags
Latest News
-
28 March 2024
An Introduction to TPS54302DDCR Synchronous Buck Converter
Ⅰ. What is TPS54302DDCR?Ⅱ. Characteristics of TPS54302DDCRⅢ. Simplified schematic of TPS54302DDCRⅣ. What are the advantages of TPS54302DDCR?Ⅴ. Technical parameters of TPS54302DDCRⅥ. Pin configuration and functions of TPS54302DDCRⅦ. Protection... -
28 March 2024
UCC27517DBVR Gate Driver: Replacements, Advantages, Application and Package
Ⅰ. UCC27517DBVR overviewⅡ. Technical parameters of UCC27517DBVRⅢ. UCC27517DBVR's typical characteristicsⅣ. What are the advantages of UCC27517DBVR compared with other gate driver ICs?Ⅴ. What applications is the UCC27517DBVR typically... -
29 March 2024
TLP2362 Optocoupler Characteristics, Specifications, Working Principle and More
Ⅰ. Overview of TLP2362Ⅱ. Characteristics of TLP2362Ⅲ. Specifications of TLP2362Ⅳ. Recommended operating conditions of TLP2362Ⅴ. How does TLP2362 work?Ⅵ. Internal equivalent circuit of TLP2362Ⅶ. Storage and soldering of... -
29 March 2024
STM32H743VIT6 Specifications, Characteristics, Pinout and Market Situation
Ⅰ. Description of STM32H743VIT6Ⅱ. Specifications of STM32H743VIT6Ⅲ. Characteristics of STM32H743VIT6Ⅳ. How to use STM32H743VIT6?Ⅴ. STM32H743VIT6 pinoutⅥ. Low-power strategy of STM32H743VIT6Ⅶ. Market situation of STM32H743VIT6Ⅰ. Description of STM32H743VIT6The STM32H743VIT6...
Help you to save your cost and time.
Reliable package for your goods.
Fast Reliable Delivery to save time.
Quality premium after-sale service.