EPM7128AETI144-7N

Altera EPM7128AETI144-7N

Part Number:
EPM7128AETI144-7N
Manufacturer:
Altera
Ventron No:
3630740-EPM7128AETI144-7N
Description:
IC CPLD 128MC 7.5NS 144TQFP
ECAD Model:
Datasheet:
EPM7128AETI144-7N

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Specifications
Altera EPM7128AETI144-7N technical specifications, attributes, parameters and parts with similar specifications to Altera EPM7128AETI144-7N.
  • Factory Lead Time
    10 Weeks
  • Mount
    Surface Mount
  • Package / Case
    TQFP
  • Number of Pins
    144
  • Published
    1998
  • JESD-609 Code
    e3
  • Pbfree Code
    yes
  • Moisture Sensitivity Level (MSL)
    3
  • Number of Terminations
    144
  • ECCN Code
    3A991
  • Terminal Finish
    Matte Tin (Sn) - annealed
  • Max Operating Temperature
    85°C
  • Min Operating Temperature
    -40°C
  • Additional Feature
    YES
  • Subcategory
    Programmable Logic Devices
  • Technology
    CMOS
  • Terminal Position
    QUAD
  • Terminal Form
    GULL WING
  • Peak Reflow Temperature (Cel)
    250
  • Supply Voltage
    3.3V
  • Terminal Pitch
    0.5mm
  • Frequency
    166.67MHz
  • Reflow Temperature-Max (s)
    30
  • Pin Count
    144
  • Qualification Status
    Not Qualified
  • Operating Supply Voltage
    3.3V
  • Temperature Grade
    INDUSTRIAL
  • Max Supply Voltage
    3.6V
  • Min Supply Voltage
    3V
  • Number of I/O
    100
  • Memory Type
    EEPROM
  • Propagation Delay
    7.5 ns
  • Turn On Delay Time
    7.5 ns
  • Frequency (Max)
    192.3MHz
  • Programmable Logic Type
    EE PLD
  • Number of Gates
    2500
  • Number of Programmable I/O
    36
  • Number of Logic Blocks (LABs)
    8
  • Speed Grade
    7
  • Output Function
    MACROCELL
  • Number of Macro Cells
    128
  • JTAG BST
    YES
  • In-System Programmable
    YES
  • Height
    1.4mm
  • Length
    20mm
  • Width
    20mm
  • RoHS Status
    RoHS Compliant
  • Lead Free
    Lead Free
Description
EPM7128AETI144-7N Overview
There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is embedded in the TQFP package.This device has 100 I/O ports programmed into it.The device is programmed with 144 terminations.This electrical part is wired with a terminal position of QUAD.Power is provided by a supply voltage of 3.3V volts.There is a part in the family [0].It has 144pins programmed.This device also displays [0].As a building block for digital circuits, there are 2500gates.If high efficiency is to be achieved, the supply voltage should be maintained at [0].For data storage, EEPROMis adopted.It is mounted by Surface Mount.It is designed with 144 pins.A maximum supply voltage of 3.6Vis used in its operation.It is powered by 3Vas its minimum supply voltage.Currently, there are 36 Programmable I/Os available.There is a maximum frequency of 166.67MHz.In order to operate properly, the operating temperature should be higher than -40°C.The operating temperature should be lower than 85°C.In its simplest form, it consists of 8 logic blocks (LABs).It is recommended that the maximal frequency be lower than 192.3MHz.Types of programmable logic are divided into EE PLD.

EPM7128AETI144-7N Features
TQFP package
100 I/Os
144 pin count
144 pins
8 logic blocks (LABs)

EPM7128AETI144-7N Applications
There are a lot of Altera EPM7128AETI144-7N CPLDs applications.

TIMERS/COUNTERS
Software-driven hardware configuration
Wide Vin Industrial low power SMPS
USB Bus
Synchronous or asynchronous mode
Programmable polarity
State machine design
PLC analog input modules
DMA control
Timing control
EPM7128AETI144-7N More Descriptions
CPLD MAX 7000A Family 2.5K Gates 128 Macro Cells 129.9MHz 3.3V 144-Pin TQFP
CPLD - Complex Programmable Logic Devices CPLD - MAX 7000 128 Macro 36 IOs
EE PLD, 7.5ns, 128-Cell, CMOS, PQFP144
Product Description Demo for Development.
MAX7000 CPLD 128 Macrocells
Certification
  • ISO 9001
  • ISO 13485
  • ISO 45001
  • ASA
  • ESD
  • DUNS
  • SMTA
  • ROHS

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