EP2S30F672C5N

Altera EP2S30F672C5N

Part Number:
EP2S30F672C5N
Manufacturer:
Altera
Ventron No:
3129974-EP2S30F672C5N
Description:
IC FPGA 500 I/O 672FBGA
ECAD Model:
Datasheet:
Stratix II Device Handbook

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Specifications
Altera EP2S30F672C5N technical specifications, attributes, parameters and parts with similar specifications to Altera EP2S30F672C5N.
  • Factory Lead Time
    8 Weeks
  • Mounting Type
    Surface Mount
  • Package / Case
    672-BBGA, FCBGA
  • Surface Mount
    YES
  • Operating Temperature
    0°C~85°C TJ
  • Packaging
    Tray
  • Published
    2011
  • Series
    Stratix® II
  • JESD-609 Code
    e1
  • Part Status
    Active
  • Moisture Sensitivity Level (MSL)
    3 (168 Hours)
  • Number of Terminations
    672
  • ECCN Code
    3A001.A.7.A
  • Terminal Finish
    Tin/Silver/Copper (Sn/Ag/Cu)
  • HTS Code
    8542.39.00.01
  • Subcategory
    Field Programmable Gate Arrays
  • Technology
    CMOS
  • Voltage - Supply
    1.15V~1.25V
  • Terminal Position
    BOTTOM
  • Terminal Form
    BALL
  • Peak Reflow Temperature (Cel)
    245
  • Supply Voltage
    1.2V
  • Terminal Pitch
    1.27mm
  • Reflow Temperature-Max (s)
    40
  • Base Part Number
    EP2S30
  • JESD-30 Code
    S-PBGA-B672
  • Number of Outputs
    492
  • Qualification Status
    Not Qualified
  • Power Supplies
    1.21.5/3.33.3V
  • Number of I/O
    500
  • Clock Frequency
    640MHz
  • Number of Inputs
    500
  • Organization
    13552 CLBS
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Number of Logic Elements/Cells
    33880
  • Total RAM Bits
    1369728
  • Number of LABs/CLBs
    1694
  • Combinatorial Delay of a CLB-Max
    5.962 ns
  • Number of CLBs
    13552
  • Height Seated (Max)
    2.6mm
  • Length
    35mm
  • Width
    35mm
  • RoHS Status
    RoHS Compliant
Description
EP2S30F672C5N Overview
The package or case of this product is 672-BBGA or FCBGA, and it has a JESD-609 code. The e1 code indicates that it is compliant with RoHS standards. The ECCN code is 3A001.A.7.A, and the HTS code is 8542.39.00.01. The terminal form is BALL, with a terminal pitch of 1.27mm. The base part number is EP2S30 and it has a JESD-30 code of S-PBGA-B672. This product is currently not qualified for use, and it has a total of 13552 configurable logic blocks (CLBs).

EP2S30F672C5N Features
500 I/Os
Up to 1369728 RAM bits

EP2S30F672C5N Applications
There are a lot of Intel EP2S30F672C5N FPGAs applications.

Software-defined radios
Security systems
Artificial intelligence (AI)
High Performance Computing
Integrating multiple SPLDs
Electronic Warfare
Camera time adjustments
Medical imaging
Telecommunication
Filtering and communication encoding
EP2S30F672C5N More Descriptions
FPGA Stratix® II Family 33880 Cells 609.76MHz 90nm Technology 1.2V 672-Pin FC-FBGA
Field Programmable Gate Array, 13552 CLBs, 640MHz, 33880-Cell, CMOS, PBGA672
ALTERA EP2S30F672C5N FPGA, STRATIX II, 30K ELEMENTS, FBGA672
FPGA, STRATIX II, 30K ELEMENTS, FBGA672; No. of Logic Blocks:-; Macrocells:33880; FPGA Family:Stratix II; Case Style:BGA;
; Logic Type:EP2S30; Logic Base Number:2; No. of I/O Pins:500; Termination Type:SMD; Package/Case:672-FBGA; No. of Pins:672; Operating Temperature Range:0°C to 85°C; Operating Temp. Max:85°C; Operating Temp. Min:0°C ;RoHS Compliant: Yes
FPGA, STRATIX II, 30K ELEMENTS, FBGA672; No. of Logic Blocks: -; No. of Macrocells: 33880; FPGA Family: Stratix II; Logic Case Style: BGA; No. of Pins: 672Pins; No. of Speed Grades: -; Total RAM Bits: 1369728Kbit; No. of I/O's: 500I/O's; Clock Management: -; Core Supply Voltage Min: 1.15V; Core Supply Voltage Max: 1.25V; I/O Supply Voltage: 3.3V; Operating Frequency Max: 550MHz; Product Range: -; MSL: MSL 3 - 168 hours; SVHC: No SVHC (17-Dec-2015); Core Supply Voltage Range: 1.15V to 1.25V; Frequency: 420MHz; I/O Interface Standard: LVCMOS, LVDS, LVPECL, LVTTL, PCI; IC Temperature Range: Commercial; Logic IC Base Number: 2; Logic IC Function: EP2S30; Operating Temperature Max: 85°C; Operating Temperature Min: 0°C; Operating Temperature Range: 0°C to 85°C; Programmable Logic Type: FPGA; Supply Voltage: 1.2V; Supply Voltage Max: 1.25V; Supply Voltage Min: 1.15V; Termination Type: Surface Mount Device
Product Comparison
The three parts on the right have similar specifications to EP2S30F672C5N.
  • Image
    Part Number
    Manufacturer
    Factory Lead Time
    Mounting Type
    Package / Case
    Surface Mount
    Operating Temperature
    Packaging
    Published
    Series
    JESD-609 Code
    Part Status
    Moisture Sensitivity Level (MSL)
    Number of Terminations
    ECCN Code
    Terminal Finish
    HTS Code
    Subcategory
    Technology
    Voltage - Supply
    Terminal Position
    Terminal Form
    Peak Reflow Temperature (Cel)
    Supply Voltage
    Terminal Pitch
    Reflow Temperature-Max (s)
    Base Part Number
    JESD-30 Code
    Number of Outputs
    Qualification Status
    Power Supplies
    Number of I/O
    Clock Frequency
    Number of Inputs
    Organization
    Programmable Logic Type
    Number of Logic Elements/Cells
    Total RAM Bits
    Number of LABs/CLBs
    Combinatorial Delay of a CLB-Max
    Number of CLBs
    Height Seated (Max)
    Length
    Width
    RoHS Status
    View Compare
  • EP2S30F672C5N
    EP2S30F672C5N
    8 Weeks
    Surface Mount
    672-BBGA, FCBGA
    YES
    0°C~85°C TJ
    Tray
    2011
    Stratix® II
    e1
    Active
    3 (168 Hours)
    672
    3A001.A.7.A
    Tin/Silver/Copper (Sn/Ag/Cu)
    8542.39.00.01
    Field Programmable Gate Arrays
    CMOS
    1.15V~1.25V
    BOTTOM
    BALL
    245
    1.2V
    1.27mm
    40
    EP2S30
    S-PBGA-B672
    492
    Not Qualified
    1.21.5/3.33.3V
    500
    640MHz
    500
    13552 CLBS
    FIELD PROGRAMMABLE GATE ARRAY
    33880
    1369728
    1694
    5.962 ns
    13552
    2.6mm
    35mm
    35mm
    RoHS Compliant
    -
  • EP2S180F1020C3N
    8 Weeks
    Surface Mount
    1020-BBGA
    YES
    0°C~85°C TJ
    Tray
    -
    Stratix® II
    e1
    Active
    3 (168 Hours)
    -
    3A001.A.7.A
    Tin/Silver/Copper (Sn/Ag/Cu)
    8542.39.00.01
    Field Programmable Gate Arrays
    CMOS
    1.15V~1.25V
    BOTTOM
    BALL
    245
    1.2V
    1mm
    40
    EP2S180
    S-PBGA-B1020
    734
    Not Qualified
    1.21.5/3.33.3V
    742
    717MHz
    742
    -
    FIELD PROGRAMMABLE GATE ARRAY
    179400
    9383040
    8970
    4.672 ns
    -
    3.5mm
    33mm
    33mm
    RoHS Compliant
  • EP2S130F1020C3N
    8 Weeks
    Surface Mount
    1020-BBGA
    YES
    0°C~85°C TJ
    Tray
    -
    Stratix® II
    e1
    Active
    3 (168 Hours)
    -
    3A001.A.7.A
    Tin/Silver/Copper (Sn/Ag/Cu)
    8542.39.00.01
    Field Programmable Gate Arrays
    CMOS
    1.15V~1.25V
    BOTTOM
    BALL
    245
    1.2V
    1mm
    40
    EP2S130
    S-PBGA-B1020
    734
    Not Qualified
    1.21.5/3.33.3V
    742
    717MHz
    742
    -
    FIELD PROGRAMMABLE GATE ARRAY
    132540
    6747840
    6627
    4.672 ns
    -
    3.5mm
    33mm
    33mm
    RoHS Compliant
  • EP2S15F672C4
    -
    Surface Mount
    672-BBGA, FCBGA
    YES
    0°C~85°C TJ
    Tray
    -
    Stratix® II
    e0
    Not For New Designs
    3 (168 Hours)
    672
    3A991
    TIN LEAD
    8542.39.00.01
    Field Programmable Gate Arrays
    CMOS
    1.15V~1.25V
    BOTTOM
    BALL
    220
    1.2V
    1.27mm
    30
    EP2S15
    S-PBGA-B672
    358
    Not Qualified
    1.21.5/3.33.3V
    366
    717MHz
    366
    6240 CLBS
    FIELD PROGRAMMABLE GATE ARRAY
    15600
    419328
    780
    5.117 ns
    6240
    2.6mm
    35mm
    35mm
    Non-RoHS Compliant
Certification
  • ISO 9001
  • ISO 13485
  • ISO 45001
  • ASA
  • ESD
  • DUNS
  • SMTA
  • ROHS

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