Cypress Semiconductor Corp CY7B994V-2BBC

Description
The CY7B993V and CY7B994V High-Speed Multi-Phase PLL Clock Buffers provide user-selectable control over system clock functions. These multiple output clock drivers offer functions to optimize the timing of high-performance computer and communication systems.

Features
Guaranteed maximum Total Timing Budget (TTB) window of 500 ps
Input/Output operation from 12 MHz to 100 MHz (CY7B993V) or 24 MHz to 200 MHz (CY7B994V)
Matched pair output skew < 200 ps
Zero input-to-output delay
18 LVTTL outputs driving 50 Ω terminated lines
16 outputs at 200 MHz (commercial temperature), 6 outputs at 200 MHz (industrial temperature)
3.3V LVTTL/LVPECL, fault-tolerant, and hot insertable reference inputs
Phase adjustments in 625 ps/1300 ps steps up to ± 10.4 ns
Multiply/Divide ratios of 1-6, 8, 10, 12
Individual output bank disable
Output high impedance option for testing purposes
Fully integrated Phase Locked Loop (PLL) with lock indicator
<50-ps typical cycle-to-cycle jitter
Single 3.3V ± 10% supply
100-pin TQFP package
100-pin BGA package

Applications
High-performance computer systems
Communication systems
Networking equipment
Test and measurement equipment
Industrial automation