Analog Devices Inc. AD807A-155BR
- Part Number:
- AD807A-155BR
- Manufacturer:
- Analog Devices Inc.
- Ventron No:
- 3678664-AD807A-155BR
- Description:
- IC FIBER OPTIC RCVR 16-SOIC
- Datasheet:
- AD807A-155BR
Analog Devices Inc. AD807A-155BR technical specifications, attributes, parameters and parts with similar specifications to Analog Devices Inc. AD807A-155BR.
- Mounting TypeSurface Mount
- Package / Case16-SOIC (0.154, 3.90mm Width)
- Surface MountYES
- Operating Temperature-40°C~85°C
- PackagingTube
- JESD-609 Codee0
- Pbfree Codeno
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations16
- Terminal FinishTIN LEAD
- Voltage - Supply4.5V~5.5V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)240
- Number of Functions1
- Supply Voltage5V
- Terminal Pitch1.27mm
- Reach Compliance Codeunknown
- Time@Peak Reflow Temperature-Max (s)30
- Pin Count16
- JESD-30 CodeR-PDSO-G16
- Qualification StatusCOMMERCIAL
- ProtocolSDH Sonet
- Number of Drivers/Receivers0/1
- Length9.9mm
- Height Seated (Max)1.75mm
- Width3.9mm
- RoHS StatusNon-RoHS Compliant
AD807A-155BR Overview
LED drivers benefit from this IC's enhanced 16-SOIC (0.154, 3.90mm Width) package.The Tube package contains this receiver.Since this is a Receiver can transceiver, many solutions can use it for a variety of functions.Any Surface Mount-type PCB or development board can be used with this wide receiver.This differential driver requires a 4.5V~5.5V power supply.At any given time, there can be up to 0/1 eligible receivers/drivers for this electronic part.IC receiver likes this one are designed for use in applications where operating temperatures are -40°C~85°C.5V is the supply voltage range that this line driver ic can efficiently operate with.In this wide receiver, 16 terminations are integrated for driving and receiving signals from data.Transceiver comes with 16 standard pinouts that meet the market's requirements.
AD807A-155BR Features
Tube package
16 pin count
AD807A-155BR Applications
There are a lot of Rochester Electronics, LLC
AD807A-155BR Drivers/Receivers/Transceivers applications.
Satellite communications networks
Ethernet circuitry
Wired telephone
Cordless telephone
Desktop PC
Notebook
Pocket PC
Desktop radio
Clock radio
Tuner
LED drivers benefit from this IC's enhanced 16-SOIC (0.154, 3.90mm Width) package.The Tube package contains this receiver.Since this is a Receiver can transceiver, many solutions can use it for a variety of functions.Any Surface Mount-type PCB or development board can be used with this wide receiver.This differential driver requires a 4.5V~5.5V power supply.At any given time, there can be up to 0/1 eligible receivers/drivers for this electronic part.IC receiver likes this one are designed for use in applications where operating temperatures are -40°C~85°C.5V is the supply voltage range that this line driver ic can efficiently operate with.In this wide receiver, 16 terminations are integrated for driving and receiving signals from data.Transceiver comes with 16 standard pinouts that meet the market's requirements.
AD807A-155BR Features
Tube package
16 pin count
AD807A-155BR Applications
There are a lot of Rochester Electronics, LLC
AD807A-155BR Drivers/Receivers/Transceivers applications.
Satellite communications networks
Ethernet circuitry
Wired telephone
Cordless telephone
Desktop PC
Notebook
Pocket PC
Desktop radio
Clock radio
Tuner
AD807A-155BR More Descriptions
FIBER OPTIC RECEIVER WITH QUANTIZER AND CLOCK RECOVERY AND DATA RETIMING
ANALOG DEVICES AD807A-155BR IC, RECEIVER CLOCK/DATA
ATM/SONET/SDH Support Circuit, 1-Func, Bipolar, PDSO16
Timers & Support Products 155Mbps Lo Pwr Recovery IC
The AD807 provides the receiver functions of data quantization, signal level detect, clock recovery and data retiming for 155 Mbps NRZ data. The device, together with a PIN diode/preamplifier combination, can be used for a highly integrated, low cost, low power SONET OC-3 or SDH STM-1 fiber optic receiver. The receiver front end signal level detect circuit indicates when the input signal level has fallen below a user adjustable threshold. The threshold is set with a single external resistor. The signal level detect circuit 3 dB optical hysteresis prevents chatter at the signal level detect output. The PLL has a factory trimmed VCO center frequency and a frequency acquisition control loop that combine to guarantee frequency acquisition without false lock. This eliminates a reliance on external components such as a crystal or a SAW filter, to aid frequency acquisition. The AD807 acquires frequency and phase lock on input data using two control loops that work without requiring external control. The frequency acquisition control loop initially acquires the frequency of the input data, acquiring frequency lock on random or scrambled data without the need for a preamble. At frequency lock, the frequency error is zero and the frequency detector has no further effect. The phase acquisition control loop then works to ensure that the output phase tracks the input phase. A patented phase detector has virtually eliminated pattern jitter throughout the AD807. The device VCO uses a ring oscillator architecture and patented low noise design techniques. Jitter is 2.0 degrees rms. This low jitter results from using a fully differential signal architecture, Power Supply Rejection Ratio circuitry and a dielectrically isolated process that provides immunity from extraneous signals on the IC. The device can withstand hundreds of millivolts of power supply noise without an effect on jitter performance. The user sets the jitter peaking and acquisition time of the PLL by choosing a damping factor capacitor whose value determines loop damping. CCITT G.958 Type A jitter transfer requirements can easily be met with a damping factor of 5 or greater. Device design guarantees that the clock output frequency will drift by less than 20% in the absence of input data transitions. Shorting the damping factor capacitor, CD, brings the clock output frequency to the VCO center frequency. The AD807 consumes 140 mW and operates from a single power supply at either 5 V or –5.2 V.
ANALOG DEVICES AD807A-155BR IC, RECEIVER CLOCK/DATA
ATM/SONET/SDH Support Circuit, 1-Func, Bipolar, PDSO16
Timers & Support Products 155Mbps Lo Pwr Recovery IC
The AD807 provides the receiver functions of data quantization, signal level detect, clock recovery and data retiming for 155 Mbps NRZ data. The device, together with a PIN diode/preamplifier combination, can be used for a highly integrated, low cost, low power SONET OC-3 or SDH STM-1 fiber optic receiver. The receiver front end signal level detect circuit indicates when the input signal level has fallen below a user adjustable threshold. The threshold is set with a single external resistor. The signal level detect circuit 3 dB optical hysteresis prevents chatter at the signal level detect output. The PLL has a factory trimmed VCO center frequency and a frequency acquisition control loop that combine to guarantee frequency acquisition without false lock. This eliminates a reliance on external components such as a crystal or a SAW filter, to aid frequency acquisition. The AD807 acquires frequency and phase lock on input data using two control loops that work without requiring external control. The frequency acquisition control loop initially acquires the frequency of the input data, acquiring frequency lock on random or scrambled data without the need for a preamble. At frequency lock, the frequency error is zero and the frequency detector has no further effect. The phase acquisition control loop then works to ensure that the output phase tracks the input phase. A patented phase detector has virtually eliminated pattern jitter throughout the AD807. The device VCO uses a ring oscillator architecture and patented low noise design techniques. Jitter is 2.0 degrees rms. This low jitter results from using a fully differential signal architecture, Power Supply Rejection Ratio circuitry and a dielectrically isolated process that provides immunity from extraneous signals on the IC. The device can withstand hundreds of millivolts of power supply noise without an effect on jitter performance. The user sets the jitter peaking and acquisition time of the PLL by choosing a damping factor capacitor whose value determines loop damping. CCITT G.958 Type A jitter transfer requirements can easily be met with a damping factor of 5 or greater. Device design guarantees that the clock output frequency will drift by less than 20% in the absence of input data transitions. Shorting the damping factor capacitor, CD, brings the clock output frequency to the VCO center frequency. The AD807 consumes 140 mW and operates from a single power supply at either 5 V or –5.2 V.
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