IDT, Integrated Device Technology Inc 9DB801BFLFT

Description
The 9DB801C is a PCI Express-compatible differential buffer that provides low cycle-to-cycle jitter (50ps) and low output-to-output skew (100ps). It supports a 1 to 8 output configuration and can generate HCSL or LVDS outputs from 50 to 200MHz in PLL mode or 0 to 400Mhz in bypass mode. The 9DB801C features two de-jittering modes, high bandwidth mode for spread inputs and low bandwidth mode for non-spread inputs. It also provides real-time power management control through SRC STOP, PD#, and individual OE# input pins.

Features
8-0.7V current-mode differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
Spread spectrum modulation tolerant
Supports undriven differential outputs in PD# and SRC STOP modes
Supports polarity inversion to the output enables, SRC STOP, and PD
Outputs cycle-cycle jitter < 50ps
Outputs skew: 50ps
50-200MHz operation
Extended frequency range in bypass mode to 400MHz
PCI Express Gen I compliant
Realtime PLL lock detect output pin
48-pin SSOP/TSSOP package
Available in RoHS compliant packaging

Applications
PC or embedded systems
PCI Express applications
Clock distribution
Data synchronization