IDT, Integrated Device Technology Inc 5V19EE901PGGI
- Part Number:
- 5V19EE901PGGI
- Manufacturer:
- IDT, Integrated Device Technology Inc
- Ventron No:
- 2980770-5V19EE901PGGI
- Description:
- IC CLOCK GENERATOR
- Datasheet:
- 5V19EE901PGGI
Description
The IDT5V19EE901 is a programmable clock generator designed for high-performance data communications, telecommunications, consumer, and networking applications. It features four internal PLLs, each individually programmable, allowing for four unique non-integer-related frequencies generated from a single reference clock. The reference clock can be sourced from one of two redundant clock inputs, with automatic or manual switchover options.
The device is in-system programmable via an I2C interface and has an internal EEPROM for configuration storage and retrieval. Each PLL has a 7-bit reference divider and a 12-bit feedback divider, enabling the generation of unique frequencies. The PLL loop bandwidth is programmable for tailoring the PLL response to specific applications. Spread spectrum generation and fractional divides are supported on two of the PLLs.
There are six 8-bit output dividers, each configurable to support LVTTL, LVPECL, LVDS, or HCSL logic levels. The outputs are connected to the PLLs via a switch matrix, allowing for flexible routing of PLL outputs to any output bank. Each output's slew rate and enable/disable function are also programmable.
Features
Four internal PLLs
Internal non-volatile EEPROM
Fast (400kHz) mode I²C serial interface
Input frequency range: 1 MHz to 200 MHz
Output frequency range: 4.9 kHz to 500 MHz
Reference crystal input with programmable linear load capacitance
Crystal frequency range: 8 MHz to 50 MHz
Integrated VCXO
7-bit reference divider and 12-bit feedback divider for each PLL
8-bit output-divider blocks
Fractional division capability on one PLL
Spread spectrum generation capability on two PLLs
I/O Standards:
Outputs: 3.3 V LVTTL/LVCMOS, LVPECL, LVDS, HCSL
Inputs: 3.3 V LVTTL/LVCMOS
Programmable slew rate control
Programmable loop bandwidth
Programmable output inversion to reduce bimodal jitter
Redundant clock inputs with auto and manual switchover options
Individual output enable/disable
Power-down mode
3.3V core VDD
Available in TSSOP and VFQFPN packages
-40 to 85°C Industrial Temperature operation
Applications
Data communications
Telecommunications
Consumer electronics
Networking
Industrial control
Medical devices
Test and measurement equipment
The IDT5V19EE901 is a programmable clock generator designed for high-performance data communications, telecommunications, consumer, and networking applications. It features four internal PLLs, each individually programmable, allowing for four unique non-integer-related frequencies generated from a single reference clock. The reference clock can be sourced from one of two redundant clock inputs, with automatic or manual switchover options.
The device is in-system programmable via an I2C interface and has an internal EEPROM for configuration storage and retrieval. Each PLL has a 7-bit reference divider and a 12-bit feedback divider, enabling the generation of unique frequencies. The PLL loop bandwidth is programmable for tailoring the PLL response to specific applications. Spread spectrum generation and fractional divides are supported on two of the PLLs.
There are six 8-bit output dividers, each configurable to support LVTTL, LVPECL, LVDS, or HCSL logic levels. The outputs are connected to the PLLs via a switch matrix, allowing for flexible routing of PLL outputs to any output bank. Each output's slew rate and enable/disable function are also programmable.
Features
Four internal PLLs
Internal non-volatile EEPROM
Fast (400kHz) mode I²C serial interface
Input frequency range: 1 MHz to 200 MHz
Output frequency range: 4.9 kHz to 500 MHz
Reference crystal input with programmable linear load capacitance
Crystal frequency range: 8 MHz to 50 MHz
Integrated VCXO
7-bit reference divider and 12-bit feedback divider for each PLL
8-bit output-divider blocks
Fractional division capability on one PLL
Spread spectrum generation capability on two PLLs
I/O Standards:
Outputs: 3.3 V LVTTL/LVCMOS, LVPECL, LVDS, HCSL
Inputs: 3.3 V LVTTL/LVCMOS
Programmable slew rate control
Programmable loop bandwidth
Programmable output inversion to reduce bimodal jitter
Redundant clock inputs with auto and manual switchover options
Individual output enable/disable
Power-down mode
3.3V core VDD
Available in TSSOP and VFQFPN packages
-40 to 85°C Industrial Temperature operation
Applications
Data communications
Telecommunications
Consumer electronics
Networking
Industrial control
Medical devices
Test and measurement equipment
IDT, Integrated Device Technology Inc 5V19EE901PGGI technical specifications, attributes, parameters and parts with similar specifications to IDT, Integrated Device Technology Inc 5V19EE901PGGI.
- Mounting TypeSurface Mount
- Package / Case28-TSSOP (0.173, 4.40mm Width)
- Operating Temperature-40°C~85°C
- PackagingTube
- SeriesVersaClock® III
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Voltage - Supply3.135V~3.465V
- Base Part Number5V19EE901
- OutputHCSL, LVCMOS, LVDS, LVPECL, LVTTL
- Number of Circuits1
- Frequency (Max)500MHz
- InputLVCMOS, LVTTL, Crystal
- Ratio - Input:Output2:7
- PLLYes with Bypass
- Differential - Input:OutputNo/Yes
- Divider/MultiplierYes/Yes
The three parts on the right have similar specifications to 5V19EE901PGGI.
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ImagePart NumberManufacturerMounting TypePackage / CaseOperating TemperaturePackagingSeriesPart StatusMoisture Sensitivity Level (MSL)Voltage - SupplyBase Part NumberOutputNumber of CircuitsFrequency (Max)InputRatio - Input:OutputPLLDifferential - Input:OutputDivider/MultiplierMountNumber of PinsPublishedJESD-609 CodePbfree CodeNumber of TerminationsECCN CodeTerminal FinishMax Operating TemperatureMin Operating TemperatureHTS CodeTerminal PositionTerminal FormPeak Reflow Temperature (Cel)Number of FunctionsSupply VoltageReflow Temperature-Max (s)Pin CountQualification StatusOperating Supply VoltageSupply Voltage-Max (Vsup)Temperature GradeSupply Voltage-Min (Vsup)FamilyOutput CharacteristicsLogic IC Typefmax-MinSame Edge Skew-Max (tskwd)Number of True OutputsInput ConditioningHeight Seated (Max)LengthWidthThicknessRoHS StatusLead FreeSupplier Device PackageFactory Lead TimeContact PlatingNumber of ElementsMax Supply VoltageMin Supply VoltageView Compare
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5V19EE901PGGISurface Mount28-TSSOP (0.173, 4.40mm Width)-40°C~85°CTubeVersaClock® IIIObsolete1 (Unlimited)3.135V~3.465V5V19EE901HCSL, LVCMOS, LVDS, LVPECL, LVTTL1500MHzLVCMOS, LVTTL, Crystal2:7Yes with BypassNo/YesYes/Yes-------------------------------------------
-
-----Discontinued1----------Surface Mount282006e3yes28EAR99Matte Tin (Sn) - annealed85°C-40°C8542.39.00.01QUADNO LEAD26013.3V3028Not Qualified3.3V3.6VINDUSTRIAL3V5V3-STATEPLL BASED CLOCK DRIVER200 MHz0.075 ns5MUX1mm4mm4mm900μmRoHS CompliantLead Free------
-
Surface Mount32-VFQFN Exposed Pad-40°C~85°CTrayVersaClock® IIIObsolete3 (168 Hours)3.135V~3.465V5V19EE904LVCMOS, LVTTL1200MHzLVCMOS, LVTTL, Crystal2:7Yes with BypassNo/YesYes/Yes------------------------------------32-VFQFPN (5x5)-----
-
-----Active3---1500MHzCrystal----Surface Mount322006e3yes32EAR99-85°C-40°C-QUADNO LEAD26013.3V3032Not Qualified3.3V-INDUSTRIAL-5V3-STATEPLL BASED CLOCK DRIVER-0.075 ns7-0.9mm5mm5mm900μmRoHS CompliantLead Free-7 WeeksTin43.465V3.135V
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