IDT, Integrated Device Technology Inc 5T9302EJGI8

Description
The IDT5T93021 is a 2.5V differential clock buffer with a userselectable differential input to two LVDS outputs. It reduces loading on the preceding driver and provides an efficient clock distribution network. The IDT5T93021 can translate from differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input to LVDS outputs. It can also translate from a singleended 3.3V/2.5V LVTTL input to LVDS outputs. The redundant input capability allows for an asynchronous changeover from a primary clock source to a secondary clock source. Selectable reference inputs are controlled by SEL.
The IDT5T93021 outputs can be asynchronously enabled/disabled. When disabled, the outputs will drive to the value selected by the GL pin. Multiple power and grounds reduce noise.

Features
Guaranteed low skew: 50ps (maximum)
Very low duty cycle distortion: 125ps (maximum)
High speed propagation delay: 1.5ns (maximum)
Up to 450MHz operation
Selectable inputs
Hot insertable and overvoltage tolerant inputs
3.3V/2.5V LVTTL, HSTL eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML or LVDS input interface
Selectable differential inputs to two LVDS outputs
Powerdown mode
2.5V Voo
40°C to 85°C ambient operating temperature
Available in Leadfree (RoHS 6) package

Applications
Clock distribution