5962-9674801Q3A

Texas Instruments 5962-9674801Q3A

Part Number:
5962-9674801Q3A
Manufacturer:
Texas Instruments
Ventron No:
6389766-5962-9674801Q3A
Description:
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
ECAD Model:
Datasheet:
sn54lvth646

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Specifications
Texas Instruments 5962-9674801Q3A technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments 5962-9674801Q3A.
  • Supply voltage (min) (V)
    2.7
  • Supply voltage (max) (V)
    3.6
  • Number of channels
    8
  • IOL (max) (mA)
    48
  • IOH (max) (mA)
    -48
  • Input type
    TTL/CMOS
  • Output type
    LVTTL
  • Features
    Balanced outputs
  • Technology family
    LVT
  • Rating
    Military
  • Operating temperature range (°C)
    -55 to 125
Description

These bus transceivers and registers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH646 devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’LVTH646.

Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

When an output function is disabled, the input function still is enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

5962-9674801Q3A More Descriptions
3.3-V ABT OCTAL BUS T ANSCEIVE S AND EGISTE S WITH 3-STATE OUTPUTS 28-LCCC -55 to 125
LVT SERIES 8-BIT REGISTERED TRANSCEIVER TRUE OUTPUT CQCC28
Bus XCVR Single 8-CH 3-ST 28-Pin CLLCC Tube
3.3-V ABT OCTAL BUS TRANSCEIVERS
SN54LVTH646 3.3-V ABT OCTAL BUS
Certification
  • ISO 9001
  • ISO 13485
  • ISO 45001
  • ASA
  • ESD
  • DUNS
  • SMTA
  • ROHS

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