Texas Instruments SN74LV595ADBR
- Part Number:
- SN74LV595ADBR
- Manufacturer:
- Texas Instruments
- Ventron No:
- 3221611-SN74LV595ADBR
- Description:
- IC 8BIT SHIFT REG 3ST-OUT 16SSOP
- Datasheet:
- SN74LV595ADBR
Texas Instruments SN74LV595ADBR technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments SN74LV595ADBR.
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case16-SSOP (0.209, 5.30mm Width)
- Number of Pins16
- Operating Temperature-40°C~85°C
- PackagingTape & Reel (TR)
- Series74LV
- Pbfree Codeyes
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations16
- Additional FeaturePARALLEL OUTPUT IS REGISTERED; UNREGISTERED SERIAL SHIFT RIGHT OUTPUT
- TechnologyCMOS
- Voltage - Supply2V~5.5V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Peak Reflow Temperature (Cel)NOT SPECIFIED
- Supply Voltage2.5V
- Terminal Pitch0.65mm
- Reflow Temperature-Max (s)NOT SPECIFIED
- Base Part Number74LV595
- FunctionSerial to Parallel, Serial
- Qualification StatusNot Qualified
- Output TypeTri-State
- Number of Elements1
- Supply Voltage-Max (Vsup)5.5V
- Power Supplies3.3V
- Supply Voltage-Min (Vsup)2V
- Propagation Delay10.2 ns
- FamilyLV/LV-A/LVX/H
- Logic FunctionShift Register
- Output Characteristics3-STATE
- Logic TypeShift Register
- Output PolarityTRUE
- Number of Bits per Element8
- Trigger TypePOSITIVE EDGE
- fmax-Min45 MHz
- Count DirectionRIGHT
- Height Seated (Max)2mm
- Length6.2mm
- Width5.3mm
- RoHS StatusROHS3 Compliant
SN74LV595ADBR Overview
The Logic - Shift Registers chip from Texas Instruments is a member of the Logic - Shift Registers category. It is designed for surface mounting and is currently listed as obsolete. The chip has a DUAL terminal position and does not have a specified peak reflow temperature in Celsius. Its function is to convert serial data to parallel, and it has one element. The chip operates on a 3.3V power supply and has a minimum frequency of 45 MHz. Its count direction is to the right, and it is compliant with ROHS3 standards.
SN74LV595ADBR Features
With 16 pins
Mounted in Surface Mount type.
Based on 74LV595 family
It supplies 3.3V power
SN74LV595ADBR Applications
There are a lot of Texas Instruments SN74LV595ADBR Shift Registers applications.
Serial-to-parallel data conversion
Parallel to serial converter
Flash Memory
ROM Chips
7-segment display control
8-bit data storage
Pseudo Random Pattern Generator
Sequence generator
data transfer
Counter
The Logic - Shift Registers chip from Texas Instruments is a member of the Logic - Shift Registers category. It is designed for surface mounting and is currently listed as obsolete. The chip has a DUAL terminal position and does not have a specified peak reflow temperature in Celsius. Its function is to convert serial data to parallel, and it has one element. The chip operates on a 3.3V power supply and has a minimum frequency of 45 MHz. Its count direction is to the right, and it is compliant with ROHS3 standards.
SN74LV595ADBR Features
With 16 pins
Mounted in Surface Mount type.
Based on 74LV595 family
It supplies 3.3V power
SN74LV595ADBR Applications
There are a lot of Texas Instruments SN74LV595ADBR Shift Registers applications.
Serial-to-parallel data conversion
Parallel to serial converter
Flash Memory
ROM Chips
7-segment display control
8-bit data storage
Pseudo Random Pattern Generator
Sequence generator
data transfer
Counter
SN74LV595ADBR More Descriptions
IC 8BIT SHIFT REG 3ST-OUT 16SSOP
The LV595A devices are 8-bit shift registers designed for 2-V to 5.5-V VCC operation. These devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs except QH are in the high-impedance state. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The LV595A devices are 8-bit shift registers designed for 2-V to 5.5-V VCC operation. These devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs except QH are in the high-impedance state. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
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