Texas Instruments SN65LVDS93BDGGR

The SN65LVDS93B LVDS SerDes (serializer/deserializer) transmitter containsfour 7-bit parallel load serial-out shift registers, a 7 × clock synthesizer, and five low-voltagedifferential signaling (LVDS) drivers in a single integrated circuit. These functions allowsynchronous transmission of 28 bits of single-ended LVTTL data over five balanced-pair conductorsfor receipt by a compatible receiver, such as the DS90CR286A and SN65LVDS94.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edgeof the input clock signal (CLKIN). The rising or falling edge of the clock can be selected throughthe clock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times and then used toserially unload the data registers in 7-bit slices. The four serial streams and a phase-lockedclock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as theinput clock, CLKIN.

The SN65LVDS93B device requires no external components and little or nocontrol. The data bus appears the same at the input to the transmitter and output of the receiverwith the data transmission transparent to the users. The only user intervention is selecting aclock rising edge by inputting a high level to CLKSEL or a falling edge with a low-level input andthe possible use of the shutdown/clear (SHTDN) signal. SHTDN is an active-low input to inhibit theclock and shut off the LVDS output drivers for lower power consumption. A low level on this signalclears all internal registers at a low level.

The SN65LVDS93B is characterized for operation over ambient airtemperatures of –40°C to 85°C.