Fairchild/ON Semiconductor MM74HC74AN

FLIP-FLOP; DIP; CMOS LOGIC; -0.5 TO 7 V; /- 20 MA; -55; 125; 300; 500MW
Lead Free Set(Preset) and Reset D-Type CMOS Flip Flop -40C~85C TA 4muA 5pF 2V~6V
Flip Flop D-Type Pos-Edge 2-Element 14-Pin PDIP Rail - Rail/Tube
FAIRCHILD SEMICONDUCTOR MM74HC74ANFlip-Flop, D, 10 ns, 72 MHz, 5.2 mA, DIP, 14 Pins
IC, 74HC CMOS, 74HC74, DIP14, 6V; Flip-Flop Type:D; Propagation Delay:10ns; Frequency:72MHz; Output Current:5.2mA; Trigger Type:Positive Edge; Supply Voltage Range:2V to 6V; Logic Case Style:DIP; No. of Pins:14; Operating Temperature Range:-40°C to 85°C; SVHC:No SVHC (20-Jun-2011); Base Number:74; Device Marking:74HC74; IC Generic Number:74HC74; Logic Function Number:7474; Logic IC Base Number:7474; Logic IC Family:HC; Logic IC Function:Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger; No. of Gates:2; No. of Inputs:1; Operating Temperature Max:85°C; Operating Temperature Min:-40°C; Output Type:Differential / Complementary; Package / Case:DIP; Supply Voltage:6V; Supply Voltage Max:6V; Supply Voltage Min:2V; Termination Type:Through Hole
The MM74HC74A utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to the equivalent LS-TTL part. It possesses the high noise immu-nity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads. This flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level at the appropriate input. The 74HC logic family is functionally and pin out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to V CC and ground.