Microchip Technology MIC68200-1.5YML-TR

Description
The MIC68200 is a high peak current LDO regulator designed for powering applications such as FPGA core voltages that require high start-up current with lower nominal operating current. It operates from a wide input range of 1.65V to 5.5V and can source up to 2A of current for start-up. The MIC68200 incorporates a delay pin (DLY) for control of power-on reset output (POR) at turn-on and power-down delay at turn-off. Additionally, there is a ramp control pin (RC) for either tracking applications or output voltage slew rate adjustment at turn-on. Multiple MIC68200s can be daisy-chained in tracking or sequencing modes. The MIC68200 is fully protected offering both thermal and current limit protection and reverse current protection. It is available in fixed and adjustable voltage options and is offered in a tiny 10-pin 3mm x 3mm VDFN package.

Features
Stable with 4.7 uF ceramic capacitor
Input voltage range: 1.65V to 5.5V
0.5V reference ±1.0% initial output tolerance
2A maximum output current - peak start-up
1A continuous operating current
Tracking on turn-on and turn-off with pin strapping
Timing controlled sequencing on/off
Programmable ramp control for in-rush current limiting and slew rate control of the output voltage on turn-on and turn-off
Power-on reset (POR) supervisor with programmable delay time
Single host can control multiple client regulators with tracking output voltages
Tiny 3 mm x 3 mm VDFN package
Maximum dropout (VIN - VOUT) of 400 mV over temperature at 1A output current
Fixed and adjustable output voltages
Excellent line and load regulation specifications
Logic controlled shutdown
Thermal shutdown and current limit protection

Applications
FPGA/PLD power supply
Networking/telecom equipment
Microprocessor core voltage
High efficiency linear post regulator
Sequenced or tracked power supply