ON Semiconductor MC100EPT21DG

Translator CML/LVDS/LVPECL to LVCMOS/LVTTL 1-CH Unidirectional 8-Pin SOIC N Tube
No. Of Inputs:1Inputs; Output Current:24Ma; Propagation Delay:1.4Ns; No. Of Pins:8Pins; Logic Case Style:Soic; Supply Voltage Min:3V; Supply Voltage Max:3.6V; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Msl:- Rohs Compliant: Yes |Onsemi MC100EPT21DG.
IC, SM, LOGIC, TRANSLATOR,; Logic IC Function:Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator; Logic IC Family:100EPT; Logic IC Base Number:100EPT21; No. of Channels:1; Time, Rise:600ps; Time, Fall:600ps; Current, Supply:18mA; Voltage, Supply Min:3V; Voltage, Supply Max:3.6V; Case Style:SOIC; Operating Temperature Range:-40°C to 85°C; No. of Pins:8; Termination Type:SMD
The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator. Because LVPECL/LVDS/CML input levels and LVTTL/LVCMOS output levels are used only 3.3V and ground are required. The small outline 8-lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal. The VBB output allows the EPT21 to be cap coupled in either single-ended or differential input mode. When single-ended cap coupled VBB output tied to the D0 input for a non-inverting buffer or the D0 input for an inverting buffer. When cap coupled differentially VBB output is connected through a resistor to each input pin. If used the VBB pin should be bypassed to VCC via a 0.01 F capacitor. For additional information see AND8020. For a single-ended direct connection use an external voltage reference source such as a resistor divider. Do not use VBB for a single-ended direct connection.