Altera EP2S15F484C3
- Part Number:
- EP2S15F484C3
- Manufacturer:
- Altera
- Ventron No:
- 3636353-EP2S15F484C3
- Description:
- IC FPGA 342 I/O 484FBGA
- Datasheet:
- Stratix II Device Handbook
Altera EP2S15F484C3 technical specifications, attributes, parameters and parts with similar specifications to Altera EP2S15F484C3.
- Mounting TypeSurface Mount
- Package / Case484-BBGA
- Surface MountYES
- Operating Temperature0°C~85°C TJ
- PackagingTray
- SeriesStratix® II
- JESD-609 Codee0
- Part StatusNot For New Designs
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations484
- ECCN Code3A991
- Terminal FinishTIN LEAD
- HTS Code8542.39.00.01
- SubcategoryField Programmable Gate Arrays
- TechnologyCMOS
- Voltage - Supply1.15V~1.25V
- Terminal PositionBOTTOM
- Terminal FormBALL
- Peak Reflow Temperature (Cel)220
- Supply Voltage1.2V
- Terminal Pitch1mm
- Reflow Temperature-Max (s)30
- Base Part NumberEP2S15
- JESD-30 CodeS-PBGA-B484
- Number of Outputs334
- Qualification StatusNot Qualified
- Power Supplies1.21.5/3.33.3V
- Number of I/O342
- Clock Frequency717MHz
- Number of Inputs342
- Organization6240 CLBS
- Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
- Number of Logic Elements/Cells15600
- Total RAM Bits419328
- Number of LABs/CLBs780
- Combinatorial Delay of a CLB-Max4.45 ns
- Number of CLBs6240
- Height Seated (Max)3.5mm
- Length23mm
- Width23mm
- RoHS StatusNon-RoHS Compliant
EP2S15F484C3 Overview
The product being offered is a 484-BBGA package, which is packaged in trays for easy handling and storage. It has been assigned a JESD-609 code of e0, indicating its suitability for use in high-temperature environments. Please note that this product is not intended for new designs. With a moisture sensitivity level of 3 (168 hours), it is suitable for use in a variety of applications. The terminal finish is TIN LEAD, and the HTS code is 8542.39.00.01. It has a maximum reflow temperature of 30 seconds and offers 342 I/Os. Please be aware that this product is non-RoHS compliant.
EP2S15F484C3 Features
342 I/Os
Up to 419328 RAM bits
EP2S15F484C3 Applications
There are a lot of Intel EP2S15F484C3 FPGAs applications.
Cryptography
Wireless Communications
Security systems
Server Applications
Broadcast
Automotive advanced driver assistance systems (ADAS)
Digital signal processing
Automation
Audio
Bioinformatics
The product being offered is a 484-BBGA package, which is packaged in trays for easy handling and storage. It has been assigned a JESD-609 code of e0, indicating its suitability for use in high-temperature environments. Please note that this product is not intended for new designs. With a moisture sensitivity level of 3 (168 hours), it is suitable for use in a variety of applications. The terminal finish is TIN LEAD, and the HTS code is 8542.39.00.01. It has a maximum reflow temperature of 30 seconds and offers 342 I/Os. Please be aware that this product is non-RoHS compliant.
EP2S15F484C3 Features
342 I/Os
Up to 419328 RAM bits
EP2S15F484C3 Applications
There are a lot of Intel EP2S15F484C3 FPGAs applications.
Cryptography
Wireless Communications
Security systems
Server Applications
Broadcast
Automotive advanced driver assistance systems (ADAS)
Digital signal processing
Automation
Audio
Bioinformatics
EP2S15F484C3 More Descriptions
FPGA Stratix® II Family 15600 Cells 816.99MHz 90nm Technology 1.2V 484-Pin FC-FBGA
Field Programmable Gate Array, 6240 CLBs, 717MHz, 15600-Cell, CMOS, PBGA484
IC FPGA 342 I/O 484FBGA Stratix II
Field Programmable Gate Array, 6240 CLBs, 717MHz, 15600-Cell, CMOS, PBGA484
IC FPGA 342 I/O 484FBGA Stratix II
The three parts on the right have similar specifications to EP2S15F484C3.
-
ImagePart NumberManufacturerMounting TypePackage / CaseSurface MountOperating TemperaturePackagingSeriesJESD-609 CodePart StatusMoisture Sensitivity Level (MSL)Number of TerminationsECCN CodeTerminal FinishHTS CodeSubcategoryTechnologyVoltage - SupplyTerminal PositionTerminal FormPeak Reflow Temperature (Cel)Supply VoltageTerminal PitchReflow Temperature-Max (s)Base Part NumberJESD-30 CodeNumber of OutputsQualification StatusPower SuppliesNumber of I/OClock FrequencyNumber of InputsOrganizationProgrammable Logic TypeNumber of Logic Elements/CellsTotal RAM BitsNumber of LABs/CLBsCombinatorial Delay of a CLB-MaxNumber of CLBsHeight Seated (Max)LengthWidthRoHS StatusFactory Lead TimeView Compare
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EP2S15F484C3Surface Mount484-BBGAYES0°C~85°C TJTrayStratix® IIe0Not For New Designs3 (168 Hours)4843A991TIN LEAD8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2201.2V1mm30EP2S15S-PBGA-B484334Not Qualified1.21.5/3.33.3V342717MHz3426240 CLBSFIELD PROGRAMMABLE GATE ARRAY156004193287804.45 ns62403.5mm23mm23mmNon-RoHS Compliant--
-
Surface Mount1020-BBGAYES0°C~85°C TJTrayStratix® IIe1Active3 (168 Hours)-3A001.A.7.ATin/Silver/Copper (Sn/Ag/Cu)8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2451.2V1mm40EP2S180S-PBGA-B1020734Not Qualified1.21.5/3.33.3V742640MHz74271760 CLBSFIELD PROGRAMMABLE GATE ARRAY179400938304089705.962 ns717603.5mm33mm33mmRoHS Compliant8 Weeks
-
Surface Mount484-BBGAYES0°C~85°C TJTrayStratix® IIe1Active3 (168 Hours)4843A991Tin/Silver/Copper (Sn/Ag/Cu)8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2601.2V1mm40EP2S15S-PBGA-B484334Not Qualified1.21.5/3.33.3V342717MHz3426240 CLBSFIELD PROGRAMMABLE GATE ARRAY156004193287805.117 ns62403.5mm23mm23mmRoHS Compliant8 Weeks
-
Surface Mount1020-BBGAYES0°C~85°C TJTrayStratix® IIe0Not For New Designs3 (168 Hours)-3A001.A.7.ATIN LEAD8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2201.2V1mm30EP2S180S-PBGA-B1020734Not Qualified1.21.5/3.33.3V742717MHz74271760 CLBSFIELD PROGRAMMABLE GATE ARRAY179400938304089704.672 ns717603.5mm33mm33mmNon-RoHS Compliant-
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