Maxim Integrated DS1010-75

Description
The DS1010 is a 10-tap silicon delay line with equally spaced taps providing delays from 5 ns to 500 ns. It is offered in a standard 14-pin DIP or 16-pin SOIC package. The DS1010 is an all-silicon solution that provides better economy than older hybrid techniques. It has a nominal accuracy of ±5% or ±2 ns, whichever is greater, and reproduces the input logic state at the TAP 10 output after a fixed delay. The DS1010 is designed to produce both leading and trailing edges with equal precision. Each tap is capable of driving up to 10 74LS type loads.

Features
All-silicon time delay
10 taps equally spaced
Delays are stable and precise
Leading and trailing edge accuracy
Delay tolerance 5% or ±2 ns, whichever is greater
Economical
Auto-insertable, low profile
Standard 14-pin DIP or 16-pin SOIC
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom delays available
Fast turn prototypes

Applications
The DS1010 can be used in a variety of applications, including:
Clock distribution
Signal conditioning
Pulse shaping
Delay equalization
Test equipment