Cypress Semiconductor Corp CY7B994V-2BBI

Description
The CY7B993V and CY7B994V High-speed Multi-phase PLL Clock Buffers offer user-selectable control over system clock functions. This multiple output clock driver provides the system integrator with functions necessary to optimize the timing of high-performance computer and communication systems.

Features
500 ps Max Total Timing Budget (TTB™) window
12 MHz to 100 MHz (CY7B993V), or 24 MHz to 200 MHz (CY7B994V) Input/Output Operation
Matched Pair Output Skew < 200 ps
Zero Input-to-Output Delay
18 LVTTL Outputs Driving 500Ω Terminated Lines
16 Outputs at 200 MHz: Commercial Temperature
6 Outputs at 200 MHz: Industrial Temperature
3.3V LVTTL/LVPECL, Fault-tolerant, and Hot Insertable Reference Inputs
Phase Adjustments in 625 ps/1300 ps Steps Up to ± 10.4 ns
Multiply/Divide Ratios of 1-6, 8, 10, 12
Individual Output Bank Disable
Output High Impedance Option for Testing Purposes
Fully Integrated Phase Locked Loop (PLL) with Lock Indicator
<50-ps Typical Cycle-to-Cycle Jitter
Single 3.3V ± 10% Supply
100-pin TQFP Package
100-pin BGA Package

Applications
High-speed computing
Telecommunications
Networking
Test and measurement
Industrial automation