Texas Instruments CAB4AZNRR

Description
The CAB4 is a 32-bit 1:2 Command/Address/Control Buffer and 1:4 differential Clock Buffer designed for operation on DDR4 registered DIMMs with a 1.2 V VDD mode. All inputs are pseudo-differential using external or internal voltage reference. All outputs are full swing CMOS drivers optimized to drive 15 to 50 Q effective terminated traces in DDR4 RDIMM, LRDIMM, and 3D-Stacked DIMM applications. The clock outputs, command/address outputs, control outputs, data buffer control outputs can be enabled in groups, and independently driven with different strengths to compensate for different DIMM net topologies. The DDR4 Register operates from a differential clock (CK_t and CK_c). Inputs are registered at the crossing of CK_t going HIGH, and CK_c going LOW. The input signals could be either re-driven to the outputs if one of the input signals DCS[n:0]_n is driven LOW or it could be used to access device internal control registers when certain input conditions are met. The device is characterized in the operating temperature range from -40°C to 95°C.

Features
DDR4RCD01 JEDEC Compliant
RDIMM and LRDIMM up to DDR4-2400
32 Bits 1-to-2 Register Outputs
1-to-4 Differential Clock Buffer
1.2V Operation
PLL with Internal Feedback
Configurable Driver Strength
Scalable Weak Driver
Programmable Latency
Output Driver Calibration
Address Mirroring and Inversion
DDR4 Full-Parity Operation
On-Chip Programmable VREF Generation
CA Bus Training Mode
12CTM Interface Support
Up to 16-Logical Ranks Support for 3DSRDIMMs and LRDIMMs
Up to 4 Physical Ranks Support for RDIMMs and LRDIMMs

Applications
DDR4 Memory Subsystems