ADI AD7703CR
- Part Number:
- AD7703CR
- Manufacturer:
- ADI
- Ventron No:
- 5144671-AD7703CR
- Description:
- LC2MOS 20-Bit A/D Converter
- Datasheet:
- AD7703CR
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AD7703CR More Descriptions
Single Channel Single ADC Delta-Sigma 16ksps 20-bit Serial 20-Pin SOIC W Tube
Analog to Digital Converters - ADC 20-Bit IC
IC ADC 20BIT LC2MOS MONO 20-SOIC
IC ADC 20BIT SIGMA-DELTA 20SOIC
French Electronic Distributor since 1988
The AD7703 is a 20-bit ADC which uses a sigma delta conversion technique. The analog input is continuously sampled by an analog modulator whose mean output duty cycle is proportional to the input signal. The modulator output is processed by an on-chip digital filter with a six-pole Gaussian response, which updates the output data register with 20-bit binary words at word rates up to 4kHz. The sampling rate, filter corner frequency and output word rate are set by a master clock input that may be supplied externally, or by an on-chip gate oscillator. The inherent linearity of the ADC is excellent, and endpoint accuracy is ensured by self-calibration of zero and full scale which may be initiated at any time. The self-calibration scheme can also be extended to null system offset and gain errors in the input channel. The output data is accessed through a serial port, which has two synchronous modes suitable for interfacing to shift registers or the serial ports of industry standard microcontrollers. CMOS construction ensures low power dissipation, and a power down mode reduces the idle power consumption to only 10µW.
Analog to Digital Converters - ADC 20-Bit IC
IC ADC 20BIT LC2MOS MONO 20-SOIC
IC ADC 20BIT SIGMA-DELTA 20SOIC
French Electronic Distributor since 1988
The AD7703 is a 20-bit ADC which uses a sigma delta conversion technique. The analog input is continuously sampled by an analog modulator whose mean output duty cycle is proportional to the input signal. The modulator output is processed by an on-chip digital filter with a six-pole Gaussian response, which updates the output data register with 20-bit binary words at word rates up to 4kHz. The sampling rate, filter corner frequency and output word rate are set by a master clock input that may be supplied externally, or by an on-chip gate oscillator. The inherent linearity of the ADC is excellent, and endpoint accuracy is ensured by self-calibration of zero and full scale which may be initiated at any time. The self-calibration scheme can also be extended to null system offset and gain errors in the input channel. The output data is accessed through a serial port, which has two synchronous modes suitable for interfacing to shift registers or the serial ports of industry standard microcontrollers. CMOS construction ensures low power dissipation, and a power down mode reduces the idle power consumption to only 10µW.
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