IDT, Integrated Device Technology Inc 874005AG-04LF

Description
The 874005-04 is a high-performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express systems. It attenuates high-frequency random and deterministic jitter components from PLL synthesizers and system boards. The device supports Serdes reference clock frequencies of 100MHz, 125MHz, and 250MHz. It uses IDT's 3rd Generation FemtoClock™ PLL technology to achieve low phase noise. The 874005-04 is packaged in a 24-Lead TSSOP package.

Features
Five differential LVDS output pairs
One differential clock input
Supports 100MHz, 125MHz, and 250MHz Serdes reference clocks
CLK and nCLK support LVPECL, LVDS, LVHSTL, SSTL, and HCSL input types
Output frequency range: 98MHz - 320MHz
Input frequency range: 98MHz - 128MHz
PCI Express (2.5 Gb/S) and Gen 2 (5 Gb/s) jitter compliant
RMS phase jitter @100MHz (1.875MHz-20MHz): 0.88ps (typical)
VCO range: 490MHz - 640MHz
Cycle-to-cycle jitter: 35ps (maximum) QA = QB = ÷4
3.3V operating supply
Two bandwidth modes for jitter attenuation/tracking skew trade-offs
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package

Applications
PCI Express add-in cards
Space-constrained applications