IDT, Integrated Device Technology Inc 87339AGI-11LFT

Description
The 873391-11 is a low skew, high-performance Differential-to-3.3V LVPECL Clock Generator/Divider. It has one differential clock input pair (CLK, nCLK) that can accept most standard differential input levels, including LVDS, LVPECL, LVHSTL, SSTL, and HCSL. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 873391-11 ideal for clock distribution applications demanding well-defined performance and repeatability.

Features
Dual 2, 4 differential 3.3V LVPECL outputs
Dual 4, 5, 6 differential 3.3V LVPECL outputs
Maximum clock input frequency: 1GHz
Translates any single-ended input signal (LVCMOS, LVTTL, GTL) to LVPECL levels with resistor bias on nCLK input
Output skew: 35ps (maximum)
Part-to-part skew: 385ps (maximum)
Bank skew: Bank A - 20ps (maximum), Bank B - 20ps (maximum)
Propagation delay: 2.1ns (maximum)
LVPECL mode operating voltage supply range: Voc 3V to 3.6V, VEE = 0V
Available in lead-free (RoHS 6) package

Applications
Clock distribution
Datacom/telecom systems
Networking equipment
Test and measurement equipment
Industrial control systems