Fairchild/ON Semiconductor 74LVX273M
- Part Number:
- 74LVX273M
- Manufacturer:
- Fairchild/ON Semiconductor
- Ventron No:
- 3209255-74LVX273M
- Description:
- IC D-TYPE POS TRG SNGL 20SOIC
- Datasheet:
- 74LVX273M
Fairchild/ON Semiconductor 74LVX273M technical specifications, attributes, parameters and parts with similar specifications to Fairchild/ON Semiconductor 74LVX273M.
- Factory Lead Time6 Weeks
- Lifecycle StatusACTIVE (Last Updated: 2 days ago)
- Contact PlatingTin
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case20-SOIC (0.295, 7.50mm Width)
- Number of Pins20
- Weight801mg
- Operating Temperature-40°C~85°C TA
- PackagingTube
- Series74LVX
- JESD-609 Codee3
- Pbfree Codeyes
- Part StatusActive
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations20
- ECCN CodeEAR99
- SubcategoryFF/Latches
- TechnologyCMOS
- Voltage - Supply2V~3.6V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Supply Voltage2.7V
- Base Part Number74LVX273
- FunctionMaster Reset
- Output TypeNon-Inverted
- Operating Supply Voltage2.5V
- Number of Elements1
- PolarityNon-Inverting
- Supply Voltage-Min (Vsup)2V
- Number of Channels8
- Load Capacitance50pF
- Number of Bits8
- Clock Frequency90MHz
- Propagation Delay20 ns
- Quiescent Current4μA
- Turn On Delay Time7.1 ns
- FamilyLV/LV-A/LVX/H
- Logic FunctionD-Type, Flip-Flop
- Current - Output High, Low4mA 4mA
- Max I(ol)0.004 A
- Max Propagation Delay @ V, Max CL14.5ns @ 3.3V, 50pF
- Trigger TypePositive Edge
- Input Capacitance4pF
- Number of Input Lines3
- Clock Edge Trigger TypePositive Edge
- Height2.34mm
- Length12.8mm
- Width7.47mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
74LVX273M Overview
The package or case of the device is a 20-SOIC, with a width of 0.295 inches or 7.50mm. The ECCN code for this device is EAR99, indicating that it does not have any specific export control requirements. The supply voltage required for this device is 2.7V. The function of the device is to act as a master reset. The output type is non-inverted, meaning that the output signal is the complement of the input signal. The minimum supply voltage required for proper operation is 2V. This device has a total of 8 channels. The load capacitance for this device is 50pF. The propagation delay, or the time it takes for the output to respond to a change in the input, is 20 ns. The quiescent current, or the current consumed by the device when it is not actively switching, is 4μA.
74LVX273M Features
Tube package
74LVX series
20 pins
8 Bits
74LVX273M Applications
There are a lot of ON Semiconductor 74LVX273M Flip Flops applications.
Test & Measurement
CMOS Process
ESD performance
ESD protection
ESCC
QML qualified product
Single Down Count-Control Line
Memory
Power down protection
Computing
The package or case of the device is a 20-SOIC, with a width of 0.295 inches or 7.50mm. The ECCN code for this device is EAR99, indicating that it does not have any specific export control requirements. The supply voltage required for this device is 2.7V. The function of the device is to act as a master reset. The output type is non-inverted, meaning that the output signal is the complement of the input signal. The minimum supply voltage required for proper operation is 2V. This device has a total of 8 channels. The load capacitance for this device is 50pF. The propagation delay, or the time it takes for the output to respond to a change in the input, is 20 ns. The quiescent current, or the current consumed by the device when it is not actively switching, is 4μA.
74LVX273M Features
Tube package
74LVX series
20 pins
8 Bits
74LVX273M Applications
There are a lot of ON Semiconductor 74LVX273M Flip Flops applications.
Test & Measurement
CMOS Process
ESD performance
ESD protection
ESCC
QML qualified product
Single Down Count-Control Line
Memory
Power down protection
Computing
74LVX273M More Descriptions
Flip Flop D-Type Bus Interface Pos-Edge 1-Element 20-Pin SOIC W Rail
74LVX, SMD, 74LVX273, SOIC20; Logic IC function:Octal D-Type Flip-Flop with Reset; Positive-Edge Trigger; Logic IC family:LVX; Logic IC Base Number:74273; Case style:SOIC; Temperature, operating range:-40°C to 85°C; Base number:74; Gates, No. of:8; IC Generic number:74LVX273; Inputs, No. of:1; Logic function number:273; Pins, No. of:20; Temp, op. max:85°C; Temp, op. min:-40°C; Termination Type:SMD; Voltage, supply:3.6V; Voltage, supply max:3.6V; Voltage, supply min:2.7V
The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR#) input load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR# input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems.
74LVX, SMD, 74LVX273, SOIC20; Logic IC function:Octal D-Type Flip-Flop with Reset; Positive-Edge Trigger; Logic IC family:LVX; Logic IC Base Number:74273; Case style:SOIC; Temperature, operating range:-40°C to 85°C; Base number:74; Gates, No. of:8; IC Generic number:74LVX273; Inputs, No. of:1; Logic function number:273; Pins, No. of:20; Temp, op. max:85°C; Temp, op. min:-40°C; Termination Type:SMD; Voltage, supply:3.6V; Voltage, supply max:3.6V; Voltage, supply min:2.7V
The LVX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR#) input load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR# input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems.
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