IDT, Integrated Device Technology Inc 2308-2DCG8

Description
The IDT2308 is a highspeed phaselock loop (PLL) clock multiplier designed for highspeed clock distribution and multiplication applications. It operates within a frequency range of 10 to 133MHz and achieves zero delay by aligning the phase between the incoming clock and the output clock.
The IDT2308 has two banks of four outputs each, controlled by two select addresses. Both banks can be put into tristate mode through proper selection of input addresses. In test mode, the PLL is turned off, and the input clock directly drives the outputs for system testing purposes. In the absence of an input clock, the IDT2308 enters power down, and the outputs are tristated, drawing less than 25μA.
The IDT2308 is available in six unique configurations for both prescaling and multiplication of the input REF Clock. The PLL is closed externally, providing flexibility in controlling the delay between the input clock and the outputs.

Features
3.3V VDD operation
Zero delay clock multiplier
PhaseLock Loop Clock Distribution
Distributes one clock input to two banks of four outputs
Separate output enable for each output bank
External feedback (FBK) pin for synchronizing outputs to the clock input
Output Skew <200 ps
Low jitter <200 ps cycletocycle
1x, 2x, 4x output options
No external RC network required
Available in SOIC and TSSOP packages

Applications
Highspeed clock distribution
Clock multiplication
Phaselocked loop applications
Industrial and Commercial temperature ranges