Search for "SN74SS"
-
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS
-
24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS
-
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
-
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
-
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
-
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
-
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
-
24-BIT TO 48-BIT REGISTERED BUFFER WITH SSTL_2 INPUTS AND OUTPUTS
-
20-BIT SSTL_3 INTERFACE UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
-
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS
-
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS
-
28-Bit to 56-Bit Registered Buffer With Address Parity Test and One Pair to Four Pair Differential C
-
28-Bit to 56-Bit Registered Buffer With Address Parity Test and One Pair to Four Pair Differential C
-
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS
-
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS
-
200-MHz, 13-bit to 26-bit registered buffer with SSTL_2 inputs and outputs
-
13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL 2 INPUTS AND OUTPUTS
-
200-MHz, 13-bit to 26-bit registered buffer with SSTL_2 inputs and outputs
-
28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS PARITY TEST ONE PAIR TO FOUR PAIR DIFFERENTIAL CLOCK
-
28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS PARITY TEST ONE PAIR TO FOUR PAIR DIFFERENTIAL CLOCK
-
810-MHz, JEDEC SSTE32882 compliant 28-bit to 56-bit registered buffer with address-parity test
-
1.5-V/1.8-V 25-bit configurable registered buffer with address-parity test
-
500-MHz, 13-bit to 26-bit registered buffer with SSTL_2 inputs and outputs
-
JEDEC SSTE32882-compliant low power 28-bit to 56-bit registered buffer with address-parity test
