XCR3064XL-10CPG56C

Xilinx Inc. XCR3064XL-10CPG56C

Part Number:
XCR3064XL-10CPG56C
Manufacturer:
Xilinx Inc.
Ventron No:
3629473-XCR3064XL-10CPG56C
Description:
IC CPLD 64MC 9.1NS 56CSP
ECAD Model:
Datasheet:
XCR3064XL-10CPG56C

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Specifications
Xilinx Inc. XCR3064XL-10CPG56C technical specifications, attributes, parameters and parts with similar specifications to Xilinx Inc. XCR3064XL-10CPG56C.
  • Factory Lead Time
    10 Weeks
  • Mount
    Surface Mount
  • Mounting Type
    Surface Mount
  • Package / Case
    56-LFBGA, CSPBGA
  • Number of Pins
    56
  • Operating Temperature
    0°C~70°C TA
  • Packaging
    Tray
  • Published
    1996
  • Series
    CoolRunner XPLA3
  • JESD-609 Code
    e1
  • Pbfree Code
    yes
  • Part Status
    Active
  • Moisture Sensitivity Level (MSL)
    3 (168 Hours)
  • Number of Terminations
    56
  • ECCN Code
    EAR99
  • Additional Feature
    YES
  • Subcategory
    Programmable Logic Devices
  • Technology
    CMOS
  • Terminal Position
    BOTTOM
  • Terminal Form
    BALL
  • Peak Reflow Temperature (Cel)
    260
  • Supply Voltage
    3.3V
  • Terminal Pitch
    0.5mm
  • Reflow Temperature-Max (s)
    30
  • Pin Count
    56
  • Qualification Status
    Not Qualified
  • Operating Supply Voltage
    3.3V
  • Supply Voltage-Max (Vsup)
    3.6V
  • Programmable Type
    In System Programmable (min 1K program/erase cycles)
  • Number of I/O
    48
  • Memory Type
    EEPROM
  • Propagation Delay
    10 ns
  • Turn On Delay Time
    10 ns
  • Number of Logic Elements/Cells
    4
  • Number of Gates
    1500
  • Max Frequency
    95MHz
  • Speed Grade
    10
  • Output Function
    MACROCELL
  • Number of Macro Cells
    64
  • JTAG BST
    YES
  • Voltage Supply - Internal
    3V~3.6V
  • Delay Time tpd(1) Max
    9.1ns
  • Height Seated (Max)
    1.35mm
  • Length
    6mm
  • Width
    6mm
  • RoHS Status
    ROHS3 Compliant
Description
XCR3064XL-10CPG56C Overview
64 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.It is part of the 56-LFBGA, CSPBGA package.There are 48 I/Os on the board.It is programmed to terminate devices at [0].The terminal position of this electrical component is BOTTOM.The power source is powered by 3.3Vvolts.It is a part of the family [0].It is packaged in the way of Tray.It operates with the operating temperature of 0°C~70°C TA to ensure its reliability.Ideally, the chip should be mounted by Surface Mount.The CoolRunner XPLA3series comprises this type of FPGA.With 56pins programmed, the chip is ready to use.It is also possible to find YESwhen using this device.In digital circuits, there are 1500gates, which act as a basic building block.In order to maintain high efficiency, the supply voltage should be maintained at [0].Data is stored using [0].Surface Mountmounts this electronic component.It is designed with 56 pins.Initially, the maximum supply voltage (Vsup) is 3.6V.Ideally, the maximal frequency should be lower than 95MHz Hz.Fundamental building blocks consist of 4logic elements/cells.

XCR3064XL-10CPG56C Features
56-LFBGA, CSPBGA package
48 I/Os
The operating temperature of 0°C~70°C TA
56 pin count
56 pins

XCR3064XL-10CPG56C Applications
There are a lot of Xilinx Inc. XCR3064XL-10CPG56C CPLDs applications.

Synchronous or asynchronous mode
Software-driven hardware configuration
DDC INTERFACE
Code converters
LED Lighting systems
State machine design
Bootloaders for FPGAs
Protection relays
I/O PORTS (MCU MODULE)
Custom state machines
XCR3064XL-10CPG56C More Descriptions
CPLD CoolRunner XPLA3 Family 1.5K Gates 64 Macro Cells 95MHz 0.35um (CMOS) Technology 3.3V 56-Pin CSBGA
YES 56-LFBGA CSPBGA 1996 CoolRunner XPLA3 complex programmable logic device 95MHz 6mm 10ns 3V~3.6V
CPLD - Complex Programmable Logic Devices XCR3064XL-10CPG56C
EE PLD, 10ns, 64-Cell, CMOS, PBGA48
Certification
  • ISO 9001
  • ISO 13485
  • ISO 45001
  • ASA
  • ESD
  • DUNS
  • SMTA
  • ROHS

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