Texas Instruments SN65LVDS93BIDGGRQ1

The SN65LVDS93B-Q1 transmitter contains four 7-bit parallel-load serial-outshift registers, a 7X clock synthesizer, and five Low-Voltage Differential Signaling (LVDS) linedrivers in a single integrated circuit. These functions allow 28 bits of single-ended LVTTL data tobe synchronously transmitted over five balanced-pair conductors for receipt by a compatiblereceiver, such as the DS90CR286A-Q1 and LCD panels with integrated LVDS receiver.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edgeof the input clock signal (CLKIN). The rising or falling edge of the clock can be selected via theclock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times, and then used tounload the data registers in 7-bit slices and serially. The four serial streams and a phase-lockedclock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as theinput clock, CLKIN.

The SN65LVDS93B-Q1 requires no external components and little or nocontrol. The data bus appears the same at the input to the transmitter and output of the receiverwith the data transmission transparent to the user(s). The only user intervention is selecting aclock rising edge by inputting a high level to CLKSEL or a falling edge with a low-level input, andthe possible use of the Shutdown/Clear (SHTDN). SHTDNis an active-low input to inhibit the clock, and shut off the LVDS output drivers for lower powerconsumption. A low-level on this signal clears all internal registers to a low-level.

The SN65LVDS93B-Q1 is characterized for operation over ambient airtemperatures of –40°C to 85°C.