ON Semiconductor NB6L295MNG

Description
The NB6L295 is a dual-channel programmable clock/data delay chip designed for clock or data de-skewing and timing adjustment. It offers two individual variable delay channels (PD0 and PD1) that can be configured in either Dual Delay or Extended Delay modes.

Features
Input clock frequency: >1.5 GHz with 550 mV VOUTPP
Input data rate: >2.5 Gb/s
Programmable delay range:
Dual Delay Mode: 0 ns to 6 ns per channel
Extended Delay Mode: 0 ns to 11.2 ns
Total delay range:
Dual Delay Mode: 3.2 ns to 8.8 ns per channel
Extended Delay Mode: 6 ns to 17 ns
Monotonic delay: 11 ps increments in 511 steps
Linearity: ±20 ps, maximum
Typical rise and fall times: 100 ps
Typical clock jitter: 3 ps RMS
Typical data-dependent jitter: 20 ps Pk-Pk
LVPECL, CML, or LVDS differential input compatible
LVPECL, LVCMOS, LVTTL single-ended input compatible
3-wire serial interface
Input enable/disable
Operating range: Vcc 2.375 V to 3.6 V
LVPECL output level: 780 mV peak-to-peak (typical)
Internal 50 Ω input termination provided
-40°C to 85°C ambient operating temperature
24-pin QFN, 4 mm x 4 mm

Applications
Clock and data de-skewing
Timing adjustment
Signal conditioning
Data synchronization
High-speed data transmission