Fairchild/ON Semiconductor MM74HCT373MTC
- Part Number:
- MM74HCT373MTC
- Manufacturer:
- Fairchild/ON Semiconductor
- Ventron No:
- 3712228-MM74HCT373MTC
- Description:
- IC LATCH OCTAL D-TYPE 20-TSSOP
- Datasheet:
- MM74HCT373MTC
Fairchild/ON Semiconductor MM74HCT373MTC technical specifications, attributes, parameters and parts with similar specifications to Fairchild/ON Semiconductor MM74HCT373MTC.
- Factory Lead Time9 Weeks
- Lifecycle StatusACTIVE (Last Updated: 1 day ago)
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case20-TSSOP (0.173, 4.40mm Width)
- Number of Pins20
- Weight191mg
- Operating Temperature-40°C~85°C
- PackagingTube
- Published2005
- Series74HCT
- JESD-609 Codee4
- Pbfree Codeyes
- Part StatusActive
- Moisture Sensitivity Level (MSL)1 (Unlimited)
- Number of Terminations20
- ECCN CodeEAR99
- Terminal FinishNickel/Palladium/Gold (Ni/Pd/Au)
- SubcategoryFF/Latches
- TechnologyCMOS
- Voltage - Supply4.5V~5.5V
- Terminal PositionDUAL
- Terminal FormGULL WING
- Number of Functions1
- Supply Voltage5V
- Terminal Pitch0.65mm
- Base Part Number74HCT373
- Output TypeTri-State
- Operating Supply Voltage5V
- Circuit8:8
- PolarityNon-Inverting
- Power Supplies5V
- Number of Circuits8
- Load Capacitance50pF
- Number of Ports2
- Max Supply Current1mA
- Number of Bits8
- Propagation Delay56 ns
- Quiescent Current1mA
- Turn On Delay Time25 ns
- FamilyHCT
- Logic FunctionD-Type, Latch
- Current - Output High, Low7.2mA 7.2mA
- Logic TypeD-Type Transparent Latch
- Max I(ol)0.006 A
- Independent Circuits1
- Number of Output Lines3
- Length6.5mm
- Width4.4mm
- Radiation HardeningNo
- RoHS StatusROHS3 Compliant
- Lead FreeLead Free
MM74HCT373MTC Overview
Package 20-TSSOP (0.173, 4.40mm Width) includes it. Tube is the packaging method. It is configured with an output of Tri-State. This electrical device has the logic type D-Type Transparent Latch. Electronic parts are mounted in accordance with Surface Mount. A 4.5V~5.5V voltage supply is required for operation. It operates at -40°C~85°C degrees Celsius. This FPGA is part of the 74HCT series. It is designed with 8 bits. The device consists of 20 terminations that are designed to be used in conjunction with it. 74HCT373 is the family name of it. The device is operated when the supply voltage is set to 5V. In terms of electronic devices, this one is in the HCT family. It is designed with 20 pins. This electronic part is mounted in the way of Surface Mount. This device has 2 ports. In the subcategory FF/Latches, this part belongs. A total of 5V power supplies are needed to run it. High efficiency requires maintaining the supply voltage at 5V. Input lines are converted into binary equivalents by 3 output lines. It consumes 1mA of quiescent current without being affected by external factors. It achieves superior flexibility by using 8 circuits.
MM74HCT373MTC Features
20-TSSOP (0.173, 4.40mm Width) package
74HCT series
8 Bits
74HCT373 family
20 pins
5V power supplies
MM74HCT373MTC Applications
There are a lot of ON Semiconductor MM74HCT373MTC Latches applications.
Meter applications
Parallel-to-Serial Data Conversion
Shift register
Digital bus buffer
Registers
Parallel Input
Automatic test equipment
Buffer register
Accumulator Registers
Hammer Device Information
Package 20-TSSOP (0.173, 4.40mm Width) includes it. Tube is the packaging method. It is configured with an output of Tri-State. This electrical device has the logic type D-Type Transparent Latch. Electronic parts are mounted in accordance with Surface Mount. A 4.5V~5.5V voltage supply is required for operation. It operates at -40°C~85°C degrees Celsius. This FPGA is part of the 74HCT series. It is designed with 8 bits. The device consists of 20 terminations that are designed to be used in conjunction with it. 74HCT373 is the family name of it. The device is operated when the supply voltage is set to 5V. In terms of electronic devices, this one is in the HCT family. It is designed with 20 pins. This electronic part is mounted in the way of Surface Mount. This device has 2 ports. In the subcategory FF/Latches, this part belongs. A total of 5V power supplies are needed to run it. High efficiency requires maintaining the supply voltage at 5V. Input lines are converted into binary equivalents by 3 output lines. It consumes 1mA of quiescent current without being affected by external factors. It achieves superior flexibility by using 8 circuits.
MM74HCT373MTC Features
20-TSSOP (0.173, 4.40mm Width) package
74HCT series
8 Bits
74HCT373 family
20 pins
5V power supplies
MM74HCT373MTC Applications
There are a lot of ON Semiconductor MM74HCT373MTC Latches applications.
Meter applications
Parallel-to-Serial Data Conversion
Shift register
Digital bus buffer
Registers
Parallel Input
Automatic test equipment
Buffer register
Accumulator Registers
Hammer Device Information
MM74HCT373MTC More Descriptions
Latch Transparent 3-ST 8-CH D-Type 20-Pin TSSOP Rail - Rail/Tube
74HCT373 Tube HCT 74HCT latch circuit 7.2mA 7.2mA 56ns 191mg -40C~85C
IC LATCH OCTAL D-TYPE 20-TSSOP
RAIL/OCTAL TRISTATE D LATCH TTL IN
IC D-TYPE TRANSP SGL 8:8 20TSSOP
The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicon-gate CMOS technology, which provides the inherent benefits of low power consumption and wide power supply range, but are LS-TTL input and output characteristic & pin-out compatible. The 3-STATE outputs are capable of driving 15 LS-TTL loads. All inputs are protected from damage due to static discharge by internal diodes to VCC and ground. When the MM74HCT373 LATCH ENABLE input is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a high logic level is applied to the OUTPUT CONTROL input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The MM74HCT374 are positive edge triggered flip-flops. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the CLOCK (CK) input. When a high logic level is applied to the OUTPUT CONTROL (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.
74HCT373 Tube HCT 74HCT latch circuit 7.2mA 7.2mA 56ns 191mg -40C~85C
IC LATCH OCTAL D-TYPE 20-TSSOP
RAIL/OCTAL TRISTATE D LATCH TTL IN
IC D-TYPE TRANSP SGL 8:8 20TSSOP
The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicon-gate CMOS technology, which provides the inherent benefits of low power consumption and wide power supply range, but are LS-TTL input and output characteristic & pin-out compatible. The 3-STATE outputs are capable of driving 15 LS-TTL loads. All inputs are protected from damage due to static discharge by internal diodes to VCC and ground. When the MM74HCT373 LATCH ENABLE input is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a high logic level is applied to the OUTPUT CONTROL input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The MM74HCT374 are positive edge triggered flip-flops. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the CLOCK (CK) input. When a high logic level is applied to the OUTPUT CONTROL (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.
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