NXP LPC2364FBD100

LPC2364FBD100  Description The LPC2364/65/66/67/68 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 512 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with a minimal performance penalty.

LPC2364FBD100  Features ARM7TDMI-S processor, running at up to 72 MHz Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high-performance CPU access. 8 kB/32 kB of SRAM on the ARM local bus for high-performance CPU access. 16 kB SRAM for Ethernet interface. Can also be used as a general-purpose SRAM. 8 kB SRAM for general purpose DMA use is also accessible by USB. Dual Advanced High-performance Bus (AHB) system that provides for simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention between those functions. A bus bridge allows the Ethernet DMA to access the other AHB subsystem. Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts. General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card port, as well as for memory-to-memory transfers.