Lattice Semiconductor Corporation LC5512MV-75FN484I
- Part Number:
- LC5512MV-75FN484I
- Manufacturer:
- Lattice Semiconductor Corporation
- Ventron No:
- 3123596-LC5512MV-75FN484I
- Description:
- IC CPLD 512MC 7.5NS 484FBGA
- Datasheet:
- LC5512MV-75FN484I
Lattice Semiconductor Corporation LC5512MV-75FN484I technical specifications, attributes, parameters and parts with similar specifications to Lattice Semiconductor Corporation LC5512MV-75FN484I.
- MountSurface Mount
- Mounting TypeSurface Mount
- Package / Case484-BBGA
- Number of Pins484
- Operating Temperature-40°C~105°C TJ
- PackagingTray
- Published2000
- SeriesispXPLD® 5000MV
- JESD-609 Codee1
- Pbfree Codeyes
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations484
- ECCN CodeEAR99
- Terminal FinishTin/Silver/Copper (Sn/Ag/Cu)
- Additional FeatureYES
- HTS Code8542.39.00.01
- SubcategoryProgrammable Logic Devices
- TechnologyCMOS
- Terminal PositionBOTTOM
- Terminal FormBALL
- Peak Reflow Temperature (Cel)250
- Supply Voltage3.3V
- Terminal Pitch1mm
- Reflow Temperature-Max (s)40
- Base Part NumberLC5512
- Pin Count484
- Qualification StatusNot Qualified
- Operating Supply Voltage3.3V
- Programmable TypeIn System Programmable
- Max Supply Voltage3.6V
- Min Supply Voltage3V
- Operating Supply Current33mA
- Number of I/O253
- Nominal Supply Current33mA
- Memory TypeEEPROM, SRAM
- Propagation Delay9.5 ns
- Number of Logic Elements/Cells16
- Max Frequency275MHz
- Number of Programmable I/O256
- Output FunctionMACROCELL
- Number of Macro Cells512
- JTAG BSTYES
- Voltage Supply - Internal3V~3.6V
- Delay Time tpd(1) Max7.5ns
- Height Seated (Max)2.6mm
- Length23mm
- Width23mm
- RoHS StatusRoHS Compliant
- Lead FreeLead Free
LC5512MV-75FN484I Overview
The product is designed for surface mount installation and is packaged in trays. It meets JESD-609 Code e1 standards and operates at a supply voltage of 3.3V, with a maximum supply voltage of 3.6V. The terminal pitch is 1mm and the maximum reflow temperature is 40 seconds. The output function is MACROCELL and it has a JTAG BST feature. The maximum delay time, tpd(1), is 7.5ns.
LC5512MV-75FN484I Features
484-BBGA package
253 I/Os
The operating temperature of -40°C~105°C TJ
484 pin count
484 pins
LC5512MV-75FN484I Applications
There are a lot of Lattice Semiconductor Corporation LC5512MV-75FN484I CPLDs applications.
Multiple Clock Source Selection
ROM patching
STANDARD SERIAL INTERFACE UART
Voltage level translation
Page register
Wireless Infrastructure Base Band Unit and Remote Radio Unit
White goods (Washing, Cold, Aircon ,...)
Complex programmable logic devices
Bootloaders for FPGAs
DMA control
The product is designed for surface mount installation and is packaged in trays. It meets JESD-609 Code e1 standards and operates at a supply voltage of 3.3V, with a maximum supply voltage of 3.6V. The terminal pitch is 1mm and the maximum reflow temperature is 40 seconds. The output function is MACROCELL and it has a JTAG BST feature. The maximum delay time, tpd(1), is 7.5ns.
LC5512MV-75FN484I Features
484-BBGA package
253 I/Os
The operating temperature of -40°C~105°C TJ
484 pin count
484 pins
LC5512MV-75FN484I Applications
There are a lot of Lattice Semiconductor Corporation LC5512MV-75FN484I CPLDs applications.
Multiple Clock Source Selection
ROM patching
STANDARD SERIAL INTERFACE UART
Voltage level translation
Page register
Wireless Infrastructure Base Band Unit and Remote Radio Unit
White goods (Washing, Cold, Aircon ,...)
Complex programmable logic devices
Bootloaders for FPGAs
DMA control
LC5512MV-75FN484I More Descriptions
Complex Programmable Logic Devices - CPLDs PROGRAM EXPANDED LOG
IC CPLD 512MC 7.5NS 484FPBGA
IC CPLD 512MC 7.5NS 484FPBGA
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