IDT, Integrated Device Technology Inc IDT5V9950PFGI

Description
The IDT5V9950 is a 3.3V PLL-based clock driver designed for high-performance computing and data-communications applications. It features programmable skew outputs, allowing outputs to lead or lag the reference input signal. The device has eight programmable skew outputs in four banks of two, controlled by 3-level input signals. It also has synchronous output enable and edge synchronization capabilities. The IDT5V9950 has LVTTL outputs with 12mA balanced drive outputs and low jitter (<100ps cycle-to-cycle).

Features
3.3V programmable skew PLL clock driver
Low skew: 185ps same pair, 250ps all outputs
Selectable positive or negative edge synchronization
Synchronous output enable
Input frequency: 6MHz to 200MHz
Output frequency: 6MHz to 200MHz
2x, 4x, 1/2, and 1/4 outputs
3-level inputs for skew and PLL range control
PLL bypass for DC testing
External feedback, internal loop filter
12mA balanced drive outputs
Low jitter: <100ps cycle-to-cycle
Available in TQFP package

Applications
High-performance computing
Data-communications
DSP applications