GAL16V8D-25LPN

Lattice Semiconductor Corporation GAL16V8D-25LPN

Part Number:
GAL16V8D-25LPN
Manufacturer:
Lattice Semiconductor Corporation
Ventron No:
3630060-GAL16V8D-25LPN
Description:
IC CPLD 8MC 25NS 20DIP
ECAD Model:
Datasheet:
GAL16V8

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Specifications
Lattice Semiconductor Corporation GAL16V8D-25LPN technical specifications, attributes, parameters and parts with similar specifications to Lattice Semiconductor Corporation GAL16V8D-25LPN.
  • Mounting Type
    Through Hole
  • Package / Case
    20-DIP (0.300, 7.62mm)
  • Surface Mount
    NO
  • Operating Temperature
    0°C~75°C TA
  • Packaging
    Bulk
  • Published
    1996
  • Series
    GAL®16V8
  • JESD-609 Code
    e3
  • Pbfree Code
    yes
  • Part Status
    Obsolete
  • Moisture Sensitivity Level (MSL)
    1 (Unlimited)
  • Number of Terminations
    20
  • ECCN Code
    EAR99
  • Terminal Finish
    Matte Tin (Sn)
  • Subcategory
    Programmable Logic Devices
  • Technology
    CMOS
  • Terminal Position
    DUAL
  • Peak Reflow Temperature (Cel)
    NOT SPECIFIED
  • Supply Voltage
    5V
  • Terminal Pitch
    2.54mm
  • Reach Compliance Code
    unknown
  • Reflow Temperature-Max (s)
    NOT SPECIFIED
  • Base Part Number
    GAL16V8
  • Pin Count
    20
  • JESD-30 Code
    R-PDIP-T20
  • Number of Outputs
    8
  • Qualification Status
    Not Qualified
  • Supply Voltage-Max (Vsup)
    5.25V
  • Power Supplies
    5V
  • Supply Voltage-Min (Vsup)
    4.75V
  • Programmable Type
    EE PLD
  • Number of I/O
    8
  • Clock Frequency
    37MHz
  • Propagation Delay
    25 ns
  • Architecture
    PAL-TYPE
  • Number of Inputs
    18
  • Output Function
    MACROCELL
  • Number of Macro Cells
    8
  • Number of Dedicated Inputs
    8
  • Voltage Supply - Internal
    4.75V~5.25V
  • Delay Time tpd(1) Max
    25ns
  • Number of Product Terms
    64
  • Height Seated (Max)
    5.334mm
  • Length
    26.162mm
  • Width
    7.62mm
  • RoHS Status
    RoHS Compliant
Description
GAL16V8D-25LPN Overview
There are 8 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.20-DIP (0.300, 7.62mm)is the package in which it resides.As you can see, this device has 8 I/O ports programmed into it.It is programmed that device terminations will be 20 .DUALis the terminal position of this electrical part.The power source is powered by 5Vvolts.The part is included in Programmable Logic Devices.The chip should be packaged by Bulk.To ensure reliability, the device operates at a temperature of [0].Mount the chip by Through Hole.In FPGA terms, it is a type of GAL?16V8series FPGA.There are 20 pins on the chip.Its related parts can be found in the [0].A total of 5V power supplies are needed to run it.In order to ensure proper operation, a maximum supply voltage (Vsup) of 5.25V is required.To detect input signals, there are 8 dedicated inputs.It is important that the supply voltage (Vsup) exceeds 4.75VV.The clock frequency of this device should not exceed 37MHz.This device is configured with a 8 output.It is equipped with 64 product terms.This device uses 18 inputs.

GAL16V8D-25LPN Features
20-DIP (0.300, 7.62mm) package
8 I/Os
The operating temperature of 0°C~75°C TA
20 pin count
5V power supplies
8 outputs

GAL16V8D-25LPN Applications
There are a lot of Lattice Semiconductor Corporation GAL16V8D-25LPN CPLDs applications.

I/O expansion
ROM patching
Power automation
DMA control
Reset swapping
Multiple Clock Source Selection
D/T registers and latches
SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
Dedicated input registers
Code converters
Certification
  • ISO 9001
  • ISO 13485
  • ISO 45001
  • ASA
  • ESD
  • DUNS
  • SMTA
  • ROHS

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