Altera EPM7128AEFC100-5
- Part Number:
- EPM7128AEFC100-5
- Manufacturer:
- Altera
- Ventron No:
- 3124127-EPM7128AEFC100-5
- Description:
- IC CPLD 128MC 5NS 100FBGA
- Datasheet:
- EPM7128AEFC100-5
Altera EPM7128AEFC100-5 technical specifications, attributes, parameters and parts with similar specifications to Altera EPM7128AEFC100-5.
- Factory Lead Time10 Weeks
- MountSurface Mount
- Package / CaseFBGA
- Number of Pins100
- Published1998
- JESD-609 Codee0
- Pbfree Codeno
- Moisture Sensitivity Level (MSL)3
- Number of Terminations100
- ECCN Code3A991
- Terminal FinishTin/Lead (Sn63Pb37)
- Max Operating Temperature70°C
- Min Operating Temperature0°C
- SubcategoryProgrammable Logic Devices
- TechnologyCMOS
- Terminal PositionBOTTOM
- Terminal FormBALL
- Peak Reflow Temperature (Cel)235
- Supply Voltage3.3V
- Terminal Pitch1mm
- Frequency250MHz
- Reflow Temperature-Max (s)30
- Pin Count100
- Number of Outputs84
- Operating Supply Voltage3.3V
- Temperature GradeCOMMERCIAL
- Max Supply Voltage3.6V
- Min Supply Voltage3V
- Number of I/O84
- Memory TypeEEPROM
- Propagation Delay5 ns
- Turn On Delay Time5 ns
- Frequency (Max)192.3MHz
- ArchitecturePAL-TYPE
- Programmable Logic TypeEE PLD
- Number of Gates2500
- Number of Programmable I/O84
- Number of Logic Blocks (LABs)8
- Speed Grade5
- Output FunctionMACROCELL
- Number of Macro Cells128
- JTAG BSTYES
- In-System ProgrammableYES
- Height Seated (Max)1.7mm
- Length11mm
- Width11mm
- Radiation HardeningNo
- RoHS StatusRoHS Compliant
- Lead FreeContains Lead
EPM7128AEFC100-5 Overview
The Pbfree Code indicates that the terminal finish for this particular product is Tin/Lead (Sn63Pb37). This means that the product is free of lead, and the terminals are coated with a combination of tin and lead. The maximum operating temperature for this product is 70°C, while the minimum operating temperature is 0°C. This indicates that the product can function within a range of temperatures, making it suitable for various environments. The frequency of this product is 250MHz, with a maximum frequency of 192.3MHz. It is classified as COMMERCIAL in terms of temperature grade, and its architecture is PAL-TYPE. The speed grade of this product is 5, and it has a width of 11mm, making it compact and efficient.
EPM7128AEFC100-5 Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
84 outputs
EPM7128AEFC100-5 Applications
There are a lot of Altera EPM7128AEFC100-5 CPLDs applications.
I/O expansion
Handheld digital devices
Bootloaders for FPGAs
POWER-SAVING MODES
Parity generators
Battery operated portable devices
Timing control
Digital multiplexers
INTERRUPT SYSTEM
Custom state machines
The Pbfree Code indicates that the terminal finish for this particular product is Tin/Lead (Sn63Pb37). This means that the product is free of lead, and the terminals are coated with a combination of tin and lead. The maximum operating temperature for this product is 70°C, while the minimum operating temperature is 0°C. This indicates that the product can function within a range of temperatures, making it suitable for various environments. The frequency of this product is 250MHz, with a maximum frequency of 192.3MHz. It is classified as COMMERCIAL in terms of temperature grade, and its architecture is PAL-TYPE. The speed grade of this product is 5, and it has a width of 11mm, making it compact and efficient.
EPM7128AEFC100-5 Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
84 outputs
EPM7128AEFC100-5 Applications
There are a lot of Altera EPM7128AEFC100-5 CPLDs applications.
I/O expansion
Handheld digital devices
Bootloaders for FPGAs
POWER-SAVING MODES
Parity generators
Battery operated portable devices
Timing control
Digital multiplexers
INTERRUPT SYSTEM
Custom state machines
EPM7128AEFC100-5 More Descriptions
CPLD MAX 7000A Family 2.5K Gates 128 Macro Cells 192.3MHz 3.3V 100-Pin FBGA
CPLD - Complex Programmable Logic Devices CPLD - MAX 7000 128 Macro 84 IOs
EE PLD, 5ns, 128-Cell, PAL-Type, CMOS, PBGA100
CPLD - Complex Programmable Logic Devices CPLD - MAX 7000 128 Macro 84 IOs
EE PLD, 5ns, 128-Cell, PAL-Type, CMOS, PBGA100
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