Altera EP2S60F672C3
- Part Number:
- EP2S60F672C3
- Manufacturer:
- Altera
- Ventron No:
- 3636978-EP2S60F672C3
- Description:
- IC FPGA 492 I/O 672FBGA
- Datasheet:
- Stratix II Device Handbook
Altera EP2S60F672C3 technical specifications, attributes, parameters and parts with similar specifications to Altera EP2S60F672C3.
- Mounting TypeSurface Mount
- Package / Case672-BBGA, FCBGA
- Surface MountYES
- Operating Temperature0°C~85°C TJ
- PackagingTray
- SeriesStratix® II
- JESD-609 Codee0
- Part StatusNot For New Designs
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations672
- ECCN Code3A991
- Terminal FinishTIN LEAD
- HTS Code8542.39.00.01
- SubcategoryField Programmable Gate Arrays
- TechnologyCMOS
- Voltage - Supply1.15V~1.25V
- Terminal PositionBOTTOM
- Terminal FormBALL
- Peak Reflow Temperature (Cel)220
- Supply Voltage1.2V
- Terminal Pitch1.27mm
- Reflow Temperature-Max (s)30
- Base Part NumberEP2S60
- JESD-30 CodeS-PBGA-B672
- Number of Outputs484
- Qualification StatusNot Qualified
- Power Supplies1.21.5/3.33.3V
- Number of I/O492
- Clock Frequency717MHz
- Number of Inputs492
- Organization24176 CLBS
- Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
- Number of Logic Elements/Cells60440
- Total RAM Bits2544192
- Number of LABs/CLBs3022
- Combinatorial Delay of a CLB-Max4.45 ns
- Number of CLBs24176
- Height Seated (Max)2.6mm
- Length35mm
- Width35mm
- RoHS StatusNon-RoHS Compliant
EP2S60F672C3 Overview
The ECCN code for this technology is 3A991, indicating that it falls under the category of electronics and computers. The specific technology used is CMOS, which stands for complementary metal-oxide-semiconductor. The terminal form is BALL, meaning that the device has spherical connections for its pins. It is classified under JESD-30 code S-PBGA-B672, indicating that it is a plastic ball grid array package with 672 pins. The clock frequency for this technology is 717MHz, meaning that it can process data at a rate of 717 million cycles per second. The organization of this technology is 24176 CLBS, indicating that it has 24,176 configurable logic blocks. It also has 3022 LABs/CLBs, meaning that each configurable logic block has an average of 3,022 look-up tables. The combinatorial delay of a CLB-Max is 4.45 ns, indicating the maximum time it takes for the device to process a logic function. The height when seated is 2.6mm, while the width is 35mm, making it a compact and efficient technology.
EP2S60F672C3 Features
492 I/Os
Up to 2544192 RAM bits
EP2S60F672C3 Applications
There are a lot of Intel EP2S60F672C3 FPGAs applications.
Distributed Monetary Systems
Scientific Instruments
Development Boards and Shields for Microcontrollers
Automotive driver's assistance
Audio
Data center search engines
Cryptography
Automotive Applications
Defense Applications
Space Applications
The ECCN code for this technology is 3A991, indicating that it falls under the category of electronics and computers. The specific technology used is CMOS, which stands for complementary metal-oxide-semiconductor. The terminal form is BALL, meaning that the device has spherical connections for its pins. It is classified under JESD-30 code S-PBGA-B672, indicating that it is a plastic ball grid array package with 672 pins. The clock frequency for this technology is 717MHz, meaning that it can process data at a rate of 717 million cycles per second. The organization of this technology is 24176 CLBS, indicating that it has 24,176 configurable logic blocks. It also has 3022 LABs/CLBs, meaning that each configurable logic block has an average of 3,022 look-up tables. The combinatorial delay of a CLB-Max is 4.45 ns, indicating the maximum time it takes for the device to process a logic function. The height when seated is 2.6mm, while the width is 35mm, making it a compact and efficient technology.
EP2S60F672C3 Features
492 I/Os
Up to 2544192 RAM bits
EP2S60F672C3 Applications
There are a lot of Intel EP2S60F672C3 FPGAs applications.
Distributed Monetary Systems
Scientific Instruments
Development Boards and Shields for Microcontrollers
Automotive driver's assistance
Audio
Data center search engines
Cryptography
Automotive Applications
Defense Applications
Space Applications
EP2S60F672C3 More Descriptions
FPGA Stratix® II Family 60440 Cells 816.99MHz 90nm Technology 1.2V 672-Pin FC-FBGA
Field Programmable Gate Array, 24176 CLBs, 717MHz, 60440-Cell, CMOS, PBGA672
MPC8xx Microprocessor IC MPC8xx 1 Core, 32-Bit 100MHz 357-PBGA (25x25)
IC FPGA 492 I/O 672FBGA Stratix II
Field Programmable Gate Array, 24176 CLBs, 717MHz, 60440-Cell, CMOS, PBGA672
MPC8xx Microprocessor IC MPC8xx 1 Core, 32-Bit 100MHz 357-PBGA (25x25)
IC FPGA 492 I/O 672FBGA Stratix II
The three parts on the right have similar specifications to EP2S60F672C3.
-
ImagePart NumberManufacturerMounting TypePackage / CaseSurface MountOperating TemperaturePackagingSeriesJESD-609 CodePart StatusMoisture Sensitivity Level (MSL)Number of TerminationsECCN CodeTerminal FinishHTS CodeSubcategoryTechnologyVoltage - SupplyTerminal PositionTerminal FormPeak Reflow Temperature (Cel)Supply VoltageTerminal PitchReflow Temperature-Max (s)Base Part NumberJESD-30 CodeNumber of OutputsQualification StatusPower SuppliesNumber of I/OClock FrequencyNumber of InputsOrganizationProgrammable Logic TypeNumber of Logic Elements/CellsTotal RAM BitsNumber of LABs/CLBsCombinatorial Delay of a CLB-MaxNumber of CLBsHeight Seated (Max)LengthWidthRoHS StatusFactory Lead TimeView Compare
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EP2S60F672C3Surface Mount672-BBGA, FCBGAYES0°C~85°C TJTrayStratix® IIe0Not For New Designs3 (168 Hours)6723A991TIN LEAD8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2201.2V1.27mm30EP2S60S-PBGA-B672484Not Qualified1.21.5/3.33.3V492717MHz49224176 CLBSFIELD PROGRAMMABLE GATE ARRAY60440254419230224.45 ns241762.6mm35mm35mmNon-RoHS Compliant--
-
Surface Mount1020-BBGAYES0°C~85°C TJTrayStratix® IIe1Active3 (168 Hours)-3A001.A.7.ATin/Silver/Copper (Sn/Ag/Cu)8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2451.2V1mm40EP2S130S-PBGA-B1020734Not Qualified1.21.5/3.33.3V742717MHz742-FIELD PROGRAMMABLE GATE ARRAY132540674784066274.672 ns-3.5mm33mm33mmRoHS Compliant8 Weeks
-
Surface Mount672-BBGA, FCBGAYES0°C~85°C TJTrayStratix® IIe0Not For New Designs3 (168 Hours)6723A991TIN LEAD8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2201.2V1.27mm30EP2S15S-PBGA-B672358Not Qualified1.21.5/3.33.3V366717MHz3666240 CLBSFIELD PROGRAMMABLE GATE ARRAY156004193287805.117 ns62402.6mm35mm35mmNon-RoHS Compliant-
-
Surface Mount484-BBGAYES0°C~85°C TJTrayStratix® IIe1Active3 (168 Hours)4843A991Tin/Silver/Copper (Sn/Ag/Cu)8542.39.00.01Field Programmable Gate ArraysCMOS1.15V~1.25VBOTTOMBALL2601.2V1mm40EP2S15S-PBGA-B484334Not Qualified1.21.5/3.33.3V342717MHz3426240 CLBSFIELD PROGRAMMABLE GATE ARRAY156004193287805.117 ns62403.5mm23mm23mmRoHS Compliant8 Weeks
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