Cypress Semiconductor Corp CY7B992-7JI
- Part Number:
- CY7B992-7JI
- Manufacturer:
- Cypress Semiconductor Corp
- Ventron No:
- 2981792-CY7B992-7JI
- Description:
- IC CLK BUFFR CMOS OUT 32-PLCC
- Datasheet:
- CY7B991/92
Description
The CY7B991 and CY7B992 Programmable Skew Clock Buffers (PSCB) are multiple output clock drivers that provide user-selectable control over system clock functions. They offer:
Selectable output skew up to 18 ns
Inverted and non-inverted outputs
Operation at 12 and 14 input frequency
Operation at 2x and 4x input frequency (input as low as 3.75 MHz)
Zero input to output delay
50% duty cycle outputs
Outputs drive 500 terminated lines
Low operating current
32-pin PLCC/LCC package
Jitter < 200 ps peak-to-peak (< 25 ps RMS)
Features
All output pair skew < 100 ps typical (250 ps maximum)
3.75 MHz to 80 MHz output operation
User selectable output functions
Selectable skew to 18 ns
Inverted and non-inverted
Operation at 12 and 14 input frequency
Operation at 2x and 4x input frequency (input as low as 3.75 MHz)
Zero input to output delay
50% duty cycle outputs
Outputs drive 500 terminated lines
Low operating current
32-pin PLCC/LCC package
Jitter < 200 ps peak-to-peak (< 25 ps RMS)
Applications
The PSCBs are ideal for use in high-performance computer systems where precise timing is critical. They can be used to:
Optimize the timing of clock signals
Reduce clock skew
Distribute clock signals over long distances
Multiply clock frequencies
Divide clock frequencies
The CY7B991 and CY7B992 Programmable Skew Clock Buffers (PSCB) are multiple output clock drivers that provide user-selectable control over system clock functions. They offer:
Selectable output skew up to 18 ns
Inverted and non-inverted outputs
Operation at 12 and 14 input frequency
Operation at 2x and 4x input frequency (input as low as 3.75 MHz)
Zero input to output delay
50% duty cycle outputs
Outputs drive 500 terminated lines
Low operating current
32-pin PLCC/LCC package
Jitter < 200 ps peak-to-peak (< 25 ps RMS)
Features
All output pair skew < 100 ps typical (250 ps maximum)
3.75 MHz to 80 MHz output operation
User selectable output functions
Selectable skew to 18 ns
Inverted and non-inverted
Operation at 12 and 14 input frequency
Operation at 2x and 4x input frequency (input as low as 3.75 MHz)
Zero input to output delay
50% duty cycle outputs
Outputs drive 500 terminated lines
Low operating current
32-pin PLCC/LCC package
Jitter < 200 ps peak-to-peak (< 25 ps RMS)
Applications
The PSCBs are ideal for use in high-performance computer systems where precise timing is critical. They can be used to:
Optimize the timing of clock signals
Reduce clock skew
Distribute clock signals over long distances
Multiply clock frequencies
Divide clock frequencies
Cypress Semiconductor Corp CY7B992-7JI technical specifications, attributes, parameters and parts with similar specifications to Cypress Semiconductor Corp CY7B992-7JI.
- Contact PlatingLead, Tin
- Mounting TypeSurface Mount
- Package / Case32-LCC (J-Lead)
- Surface MountYES
- Number of Pins32
- Operating Temperature-40°C~85°C
- PackagingTube
- Published2007
- JESD-609 Codee0
- Pbfree Codeno
- Part StatusObsolete
- Moisture Sensitivity Level (MSL)3 (168 Hours)
- Number of Terminations32
- ECCN CodeEAR99
- Terminal FinishTin/Lead (Sn/Pb)
- SubcategoryClock Drivers
- Voltage - Supply4.5V~5.5V
- Terminal PositionQUAD
- Terminal FormJ BEND
- Peak Reflow Temperature (Cel)220
- Number of Functions4
- Supply Voltage5V
- Reach Compliance Codenot_compliant
- Reflow Temperature-Max (s)NOT SPECIFIED
- Base Part NumberCY7B992
- Pin Count32
- Number of Outputs8
- Qualification StatusNot Qualified
- Operating Supply Voltage5V
- Power Supplies5V
- Number of Circuits1
- Nominal Supply Current90mA
- Frequency (Max)80MHz
- Family7B
- InputCMOS
- Ratio - Input:Output4:8
- Max I(ol)0.046 A
- PLLYes
- Differential - Input:OutputNo/No
- Propagation Delay (tpd)0.7 ns
- Divider/MultiplierYes/Yes
- Height Seated (Max)3.556mm
- RoHS StatusNon-RoHS Compliant
- Lead FreeContains Lead
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