Cypress Semiconductor Corp CY2305CSXI-1

Description
The CY2305C and CY2309C are 3.3 V zero delay buffers designed to distribute high speed clocks. They are available in 16pin SOIC or TSSOP packages (CY2309C), and 8pin, 150 Mil SOIC package (CY2305C). The CY2309C has two banks of four outputs each that are controlled by the select inputs. The CY2305C accepts one reference input and drives out five low skew clocks. The CY2309C accepts one reference input and drives out nine outputs, grouped as 4 4 1.

Features
10 MHz to 100133 MHz operating range
Zero input and output propagation delay
Multiple low skew outputs
One input drives five outputs (CY2305C)
One input drives nine outputs, grouped as 4 4 1 (CY2309C)
50 ps typical cycletocycle jitter (15 pF, 66 MHz)
Test mode to bypass phase locked loop (PLL) (CY2309C) only
Available in space saving 16pin 150 Mil small outline integrated circuit (SOIC) or 4.4 mm thin shrunk small outline package (TSSOP) packages (CY2309C), and 8pin, 150 Mil SOIC package (CY2305C)
3.3 V operation
Commercial, industrial and automotiveA flows available

Applications
Clock distribution
High speed data transmission
Test and measurement
Networking
Telecommunications