IDT, Integrated Device Technology Inc 9FGL08P1B000KILFT

Description
The 9FGL08 devices are 3.3V members of IDT's 3.3V Full-Featured PCle family. They have 8 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL08 supports PCle Gen1-4 Common Clocked architectures (CC) and PCle Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. The 9FGLOBP1 can be programmed with a user-defined power up default SMBus configuration.

Features
Direct connection to 1002 (xx41) or 852 (xx51) transmission lines; saves 32 resistors compared to standard PCle devices
206mW typical power consumption (62mA3.3V); eliminates thermal concerns
SMBus-selectable features allows optimization to customer requirements:
control input polarity
control input pull up/downs
slew rate for each output
differential output amplitude
33, 85 or 1000 output impedance for each output
spread spectrum amount
41 and 51 devices contain default configuration; SMBus interface not required for device operation
P1 device allows factory programming of customer-defined input/output frequencies and SMBus power up default; allows exact optimization to customer requirements.
8MHz - 40MHz input frequency with 9FGL08P1 device (25MHz default); flexibility
OE# pins; support DIF power management
Pin/SMBus selectable 0%, -0.25% or -0.5% spread on DIF outputs; minimize EMI and phase jitter for each application
DIF outputs blocked until PLL is locked; clean system start-up
Two selectable SMBus addresses; multiple devices can easily share an SMBus segment
Space saving 48-pin 6x6mm VFQFPN; minimal board space

Applications
PCle Gen1-4 clock generation for Riser Cards, Storage, Networking, JBOD, Communications, Access Points