IDT, Integrated Device Technology Inc 9FGL0251BKILF

Description
The 9FGL02 devices are 3.3V members of IDT's 3.3V Full-Featured PCle family. They have 2 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL02 supports PCle Gen1-4 Common Clocked architectures (CC) and PCle Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. The 9FGL02P1 can be programmed with a user-defined power up default SMBus configuration.

Features
Direct connection to 100Ω (xx41) or 85Ω (xx51) transmission lines; saves 8 resistors compared to standard PCle devices
112mW typical power consumption (@3.3V); eliminates thermal concerns
SMBus-selectable features allow optimization to customer requirements:
Control input polarity
Control input pull up/downs
Slew rate for each output
33, 85 or 1000Ω output impedance for each output
Spread spectrum amount
Input frequency
41 and 51 devices contain default configuration; SMBus interface not required for device operation
P1 device allows factory programming of customer-defined input/output frequencies and SMBus power up default; allows exact optimization to customer requirements
OE# pins; support DIF power management
8MHz - 40MHz input frequency with 9FGL02P1 device (25MHz default); flexibility
Pin/SMBus selectable 0%, -0.25% or -0.5% spread on DIF outputs; minimize EMI and phase jitter for each application
DIF outputs blocked until PLL is locked; clean system start-up
Two selectable SMBus addresses; multiple devices can easily share an SMBus segment
Space saving 24-pin 4x4mm VFQFPN; minimal board space

Applications
PCle Gen1-4 clock generation for Riser Cards, Storage, Networking, JBOD, Communications, Access Points