IDT, Integrated Device Technology Inc 841604AGILF

Description
The 841604 is an optimized PCle and SRIO clock generator. It uses a 25MHz parallel crystal to generate 100MHz and 125MHz clock signals, replacing solutions requiring multiple oscillator and fanout buffer solutions. The device has excellent phase jitter (<1ps mms) suitable to clock components requiring precise and lowjitter PCle or SRIO or both clock signals. Designed for telecom, networking, and industrial applications, the 841604 can also drive the highspeed SRIO and PCle SerDes clock inputs of communication processors, DSPs, switches, and bridges.

Features
Four differential clock outputs: configurable for PCle (100MHz) and SRIO (125MHz) clock signals
Selectable crystal oscillator interface, 25MHz, 18pF parallel resonant crystal or LVCMOS/LVTTL singleended reference clock input
Supports the following output frequencies: 100MHz or 125MHz
VCO: 500MHz
PLL bypass and output enable
PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant
RMS phase jitter, 125MHz, using a 25MHz crystal (1.875MHz20MHz): 0.45ps (typical)
Full 3.3V power supply mode
40°C to 85°C ambient operating temperature
Available in leadfree (RoHS 6) package

Applications
Telecom
Networking
Industrial