Microsemi Corporation ZL30152GGG2

Description
The ZL30152 is a universal rate adapting synchronous clock generator that provides programmable clock synthesis, digital phaselocked loop (PLL), and jitter filtering functions. It is designed for applications requiring highperformance clock generation and distribution in physical line interfaces, backplane interfaces, and other demanding applications.

Features
Programmable synthesizers generate any clock rate from 1 kHz to 750 MHz
Precision synthesizers generate clocks with jitter below 0.7 ps RMS for 10G PHYs
Programmable digital PLL synchronizes to any clock rate from 1 kHz to 750 MHz
Flexible twostage architecture translates between arbitrary data rates, line coding rates, and FEC rates
Digital PLL filters jitter from 14 Hz, 28 Hz, 56 Hz, 112 Hz, 224 Hz, 448 Hz, or 896 Hz
Automatic hitless reference switching and digital holdover on reference fail
Two reference inputs configurable as singleended or differential
Four LVPECL outputs and two LVCMOS outputs
Operates from a single crystal resonator or clock oscillator
Configurable via SPI/I2C interface
40°C to 85°C operating temperature range

Applications
Clock generation for physical line interfaces: SONET/SDH, OC192/OC48, SONET/SDH with FEC, 10G Base X, R, and W, 100 BaseX, GE, Fibre channel
Clock generation and distribution for backplane interfaces: TDM, Telecom Bus, Utopia, SBI, RapidIO, PCIExpress, serial MII, Star Fabric, XAUIO